fd6ea955d4
winedbg: Remove the use of gdb specific register length.
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Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:22:19 +02:00
771463adbd
winedbg: Add gdb register types to the register maps.
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Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:22:08 +02:00
a650b3d80a
winedbg: Add gdb register names to the register maps.
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Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:21:51 +02:00
6bfaa76caa
winedbg: Add gdb feature names to the register maps.
...
In order not to repeat the features, registers are expected to be
ordered and grouped by feature. If feature name is set only on the
first register of a new feature.
Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:21:28 +02:00
ff84b2f202
winedbg: Get rid of ifdefs.
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Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-19 20:52:30 +02:00
2fb792bd7c
winedbg: Fix some compiler warnings.
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Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-14 11:05:14 +02:00
1244759036
winedbg/gdbproxy: Store the register map inside the be_cpu struct.
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Signed-off-by: Zebediah Figura <zfigura@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-14 09:29:12 +02:00
cf349cea69
winedbg: Add a backend-specific vector for setting a thread's context.
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Signed-off-by: Zebediah Figura <zfigura@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-13 22:13:27 +02:00
2326179312
winedbg: Add a backend-specific vector for retrieving a thread's context.
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Signed-off-by: Zebediah Figura <zfigura@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-13 22:13:27 +02:00
eb337adcc2
ntdll: Fix CONTEXT definition for ARM.
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Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2017-12-05 13:21:31 +01:00
5ac1ecfbe5
winedbg: Improve formatting of context printing.
2013-12-10 12:20:30 +01:00
f23cb66db6
winedbg: Use BOOL type where appropriate.
2013-11-14 10:36:30 +01:00
baf4757c46
winedbg: Amend parameter name in *_fetch_integer.
2013-11-14 10:36:27 +01:00
fe580c083d
winedbg: Use BOOL type where appropriate.
2013-11-11 13:27:28 +01:00
371bbf8db4
winedbg: There is no hardware single stepping support on ARM.
2013-02-25 10:40:39 +01:00
e2761ab075
winedbg: Use an if instead of a switch in case some float types have the same size.
2013-01-08 16:35:30 +01:00
3a29e87673
winedbg: Use a switch-case style implementation in thumb2_disasm_dataprocessing.
2013-01-07 11:12:54 +01:00
2b9555fba8
winedbg: Add shifted register dataprocessing operators to Thumb2 disassembler.
2013-01-07 11:12:41 +01:00
0004788e96
winedbg: Add modified immediate dataprocessing operators to Thumb2 disassembler.
2013-01-02 18:15:03 +01:00
87fbe4ca10
winedbg: Add plain binary dataprocessing operators to Thumb2 disassembler.
2013-01-02 18:14:59 +01:00
785bdb6412
winedbg: Add load/store dual/exclusive and table branch operators to Thumb2 disassembler.
2012-12-10 17:36:29 +01:00
8818e25954
winedbg: Add load/str multiple operators to Thumb2 disassembler.
2012-12-07 10:35:59 +01:00
096426f1f1
winedbg: Adjust copyright to avoid confusions.
2012-10-08 12:54:57 +02:00
86d0c87552
winedbg: Simplify Coprocessor operators in the Thumb2 disassembler.
2012-10-08 12:54:57 +02:00
a0ae8b4bd2
winedbg: Add load non-word operators to Thumb2 disassembler.
2012-10-08 12:54:56 +02:00
13da3a92fd
winedbg: Add preload operators for Thumb2 disassembler.
2012-10-08 12:54:56 +02:00
523ca37f11
winedbg: Reorder disassembler functions to match instruction table order.
2012-10-04 10:38:19 +02:00
0ef9072e0f
winedbg: Add Coprocessor data transfer operators for Thumb2 disassembler.
2012-10-04 10:38:11 +02:00
24abf1f68b
winedbg: Add enhanced Coprocessor move operators to Thumb2 disassembler.
2012-10-04 10:38:06 +02:00
129080774d
winedbg: Add Coprocessor data operators for Thumb2 disassembler.
2012-10-04 10:37:58 +02:00
4deaee9927
winedbg: Add control operators to Thumb2 disassembler.
2012-10-03 11:19:45 +02:00
613ebcd070
winedbg: Add hint operators to Thumb2 disassembler.
2012-10-03 11:19:44 +02:00
60af8659c9
winedbg: Add special register processing operators to Thumb2 disassembler.
2012-10-03 11:19:43 +02:00
1e1e181b2e
winedbg: Improve and add branch operators for Thumb2 disassembler.
2012-10-03 11:19:43 +02:00
7e132ac1a6
winedbg: Add register data processing operators to Thumb2 disassembler.
2012-08-27 11:32:13 +02:00
c5fbebd3a6
winedbg: Add store operators to Thumb2 disassembler.
2012-08-27 11:32:09 +02:00
054d930bb7
winedbg: Add load word operators to Thumb2 disassembler.
2012-08-24 10:25:41 +02:00
538a0abbd7
include: Rename IMAGE_FILE_MACHINE_ARMV7 to IMAGE_FILE_MACHINE_ARMNT.
2012-08-17 10:45:17 +02:00
915e12e59f
winedbg: Avoid TRUE:FALSE conditional expressions.
2012-08-13 17:30:01 +02:00
ca3afdc156
winedbg: Add Coprocessor move operators to Thumb2 disassembler.
2012-08-13 12:11:22 +02:00
338f5e9cb6
winedbg: Add new operators regarding data processing to ARM disassembler.
2012-07-09 10:12:27 -04:00
b96d613337
winedbg: Add swap operator to ARM disassembler.
2012-07-09 10:12:20 -04:00
498614dda6
winedbg: Add multiplication operators to ARM disassembler.
2012-07-09 10:12:14 -04:00
bc86f0d5dd
winedbg: Add branch and exchange operator to ARM disassembler.
2012-07-09 10:12:04 -04:00
44411a3c7a
winedbg: Add long multiplication and division operators to Thumb2 disassembler.
2012-06-11 11:27:58 +02:00
82dbeed2cc
winedbg: Add multiplication operators to Thumb2 disassembler.
2012-06-11 11:27:54 +02:00
97d86f77ec
winedbg: Add partial Thumb2 disassembler.
2012-05-16 18:30:18 +02:00
f86ea4cbe9
winedbg: Complete the Thumb disassembler.
2012-05-02 11:58:51 +02:00
6795bab565
winedbg: Print all available information about branch targets in ARM disassembler.
2012-04-23 11:41:58 +02:00
474791fd89
winedbg: Add "load address" and new nops to the Thumb disassembler.
2012-04-20 11:58:43 +02:00
Rémi Bernon