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winedbg: Add gdb register names to the register maps. 

Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
This commit is contained in:
Rémi Bernon 2020-04-03 15:35:48 +02:00 committed by Alexandre Julliard
parent 6bfaa76caa
commit a650b3d80a
6 changed files with 226 additions and 225 deletions
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36
programs/winedbg/be_arm.c
View File

@ -1900,26 +1900,26 @@ static BOOL be_arm_set_context(HANDLE thread, const dbg_ctx_t *ctx)
return SetThreadContext(thread, &ctx->ctx);
}
#define REG(f,r,gs) {f, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
#define REG(f,n,r,gs) {f, n, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
static struct gdb_register be_arm_gdb_register_map[] = {
REG("core", R0, 4),
REG(NULL, R1, 4),
REG(NULL, R2, 4),
REG(NULL, R3, 4),
REG(NULL, R4, 4),
REG(NULL, R5, 4),
REG(NULL, R6, 4),
REG(NULL, R7, 4),
REG(NULL, R8, 4),
REG(NULL, R9, 4),
REG(NULL, R10, 4),
REG(NULL, R11, 4),
REG(NULL, R12, 4),
REG(NULL, Sp, 4),
REG(NULL, Lr, 4),
REG(NULL, Pc, 4),
REG(NULL, Cpsr, 4),
REG("core", "r0", R0, 4),
REG(NULL, "r1", R1, 4),
REG(NULL, "r2", R2, 4),
REG(NULL, "r3", R3, 4),
REG(NULL, "r4", R4, 4),
REG(NULL, "r5", R5, 4),
REG(NULL, "r6", R6, 4),
REG(NULL, "r7", R7, 4),
REG(NULL, "r8", R8, 4),
REG(NULL, "r9", R9, 4),
REG(NULL, "r10", R10, 4),
REG(NULL, "r11", R11, 4),
REG(NULL, "r12", R12, 4),
REG(NULL, "sp", Sp, 4),
REG(NULL, "lr", Lr, 4),
REG(NULL, "pc", Pc, 4),
REG(NULL, "cpsr", Cpsr, 4),
};
struct backend_cpu be_arm =

70
programs/winedbg/be_arm64.c
View File

@ -289,43 +289,43 @@ static BOOL be_arm64_set_context(HANDLE thread, const dbg_ctx_t *ctx)
return SetThreadContext(thread, &ctx->ctx);
}
#define REG(f,r,gs) {f, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
#define REG(f,n,r,gs) {f, n, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
static struct gdb_register be_arm64_gdb_register_map[] = {
REG("core", u.s.X0, 8),
REG(NULL, u.s.X1, 8),
REG(NULL, u.s.X2, 8),
REG(NULL, u.s.X3, 8),
REG(NULL, u.s.X4, 8),
REG(NULL, u.s.X5, 8),
REG(NULL, u.s.X6, 8),
REG(NULL, u.s.X7, 8),
REG(NULL, u.s.X8, 8),
REG(NULL, u.s.X9, 8),
REG(NULL, u.s.X10, 8),
REG(NULL, u.s.X11, 8),
REG(NULL, u.s.X12, 8),
REG(NULL, u.s.X13, 8),
REG(NULL, u.s.X14, 8),
REG(NULL, u.s.X15, 8),
REG(NULL, u.s.X16, 8),
REG(NULL, u.s.X17, 8),
REG(NULL, u.s.X18, 8),
REG(NULL, u.s.X19, 8),
REG(NULL, u.s.X20, 8),
REG(NULL, u.s.X21, 8),
REG(NULL, u.s.X22, 8),
REG(NULL, u.s.X23, 8),
REG(NULL, u.s.X24, 8),
REG(NULL, u.s.X25, 8),
REG(NULL, u.s.X26, 8),
REG(NULL, u.s.X27, 8),
REG(NULL, u.s.X28, 8),
REG(NULL, u.s.Fp, 8),
REG(NULL, u.s.Lr, 8),
REG(NULL, Sp, 8),
REG(NULL, Pc, 8),
REG(NULL, Cpsr, 4),
REG("core", "x0", u.s.X0, 8),
REG(NULL, "x1", u.s.X1, 8),
REG(NULL, "x2", u.s.X2, 8),
REG(NULL, "x3", u.s.X3, 8),
REG(NULL, "x4", u.s.X4, 8),
REG(NULL, "x5", u.s.X5, 8),
REG(NULL, "x6", u.s.X6, 8),
REG(NULL, "x7", u.s.X7, 8),
REG(NULL, "x8", u.s.X8, 8),
REG(NULL, "x9", u.s.X9, 8),
REG(NULL, "x10", u.s.X10, 8),
REG(NULL, "x11", u.s.X11, 8),
REG(NULL, "x12", u.s.X12, 8),
REG(NULL, "x13", u.s.X13, 8),
REG(NULL, "x14", u.s.X14, 8),
REG(NULL, "x15", u.s.X15, 8),
REG(NULL, "x16", u.s.X16, 8),
REG(NULL, "x17", u.s.X17, 8),
REG(NULL, "x18", u.s.X18, 8),
REG(NULL, "x19", u.s.X19, 8),
REG(NULL, "x20", u.s.X20, 8),
REG(NULL, "x21", u.s.X21, 8),
REG(NULL, "x22", u.s.X22, 8),
REG(NULL, "x23", u.s.X23, 8),
REG(NULL, "x24", u.s.X24, 8),
REG(NULL, "x25", u.s.X25, 8),
REG(NULL, "x26", u.s.X26, 8),
REG(NULL, "x27", u.s.X27, 8),
REG(NULL, "x28", u.s.X28, 8),
REG(NULL, "x29", u.s.Fp, 8),
REG(NULL, "x30", u.s.Lr, 8),
REG(NULL, "sp", Sp, 8),
REG(NULL, "pc", Pc, 8),
REG(NULL, "cpsr", Cpsr, 4),
};
struct backend_cpu be_arm64 =

1
programs/winedbg/be_cpu.h
View File

@ -25,6 +25,7 @@ enum be_xpoint_type {be_xpoint_break, be_xpoint_watch_exec, be_xpoint_watch_read
struct gdb_register
{
const char *feature;
const char *name;
size_t ctx_offset;
size_t ctx_length;
size_t gdb_length;

84
programs/winedbg/be_i386.c
View File

@ -865,51 +865,51 @@ static BOOL be_i386_set_context(HANDLE thread, const dbg_ctx_t *ctx)
return Wow64SetThreadContext(thread, &ctx->x86);
}
#define REG(f,r,gs) {f, FIELD_OFFSET(WOW64_CONTEXT, r), sizeof(((WOW64_CONTEXT*)NULL)->r), gs}
#define REG(f,n,r,gs) {f, n, FIELD_OFFSET(WOW64_CONTEXT, r), sizeof(((WOW64_CONTEXT*)NULL)->r), gs}
static struct gdb_register be_i386_gdb_register_map[] = {
REG("core", Eax, 4),
REG(NULL, Ecx, 4),
REG(NULL, Edx, 4),
REG(NULL, Ebx, 4),
REG(NULL, Esp, 4),
REG(NULL, Ebp, 4),
REG(NULL, Esi, 4),
REG(NULL, Edi, 4),
REG(NULL, Eip, 4),
REG(NULL, EFlags, 4),
REG(NULL, SegCs, 4),
REG(NULL, SegSs, 4),
REG(NULL, SegDs, 4),
REG(NULL, SegEs, 4),
REG(NULL, SegFs, 4),
REG(NULL, SegGs, 4),
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[ 0]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[10]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[20]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[30]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[40]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[50]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[60]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[70]), 10, 10},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.ControlWord), 2, 4},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.StatusWord), 2, 4},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.TagWord), 2, 4},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.ErrorSelector), 2, 4},
REG(NULL, FloatSave.ErrorOffset, 4),
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.DataSelector), 2, 4},
REG(NULL, FloatSave.DataOffset, 4),
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, FloatSave.ErrorSelector) + 2, 2, 4},
REG("core", "eax", Eax, 4),
REG(NULL, "ecx", Ecx, 4),
REG(NULL, "edx", Edx, 4),
REG(NULL, "ebx", Ebx, 4),
REG(NULL, "esp", Esp, 4),
REG(NULL, "ebp", Ebp, 4),
REG(NULL, "esi", Esi, 4),
REG(NULL, "edi", Edi, 4),
REG(NULL, "eip", Eip, 4),
REG(NULL, "eflags", EFlags, 4),
REG(NULL, "cs", SegCs, 4),
REG(NULL, "ss", SegSs, 4),
REG(NULL, "ds", SegDs, 4),
REG(NULL, "es", SegEs, 4),
REG(NULL, "fs", SegFs, 4),
REG(NULL, "gs", SegGs, 4),
{ NULL, "st0", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[ 0]), 10, 10},
{ NULL, "st1", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[10]), 10, 10},
{ NULL, "st2", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[20]), 10, 10},
{ NULL, "st3", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[30]), 10, 10},
{ NULL, "st4", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[40]), 10, 10},
{ NULL, "st5", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[50]), 10, 10},
{ NULL, "st6", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[60]), 10, 10},
{ NULL, "st7", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.RegisterArea[70]), 10, 10},
{ NULL, "fctrl", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.ControlWord), 2, 4},
{ NULL, "fstat", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.StatusWord), 2, 4},
{ NULL, "ftag", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.TagWord), 2, 4},
{ NULL, "fiseg", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.ErrorSelector), 2, 4},
REG(NULL, "fioff", FloatSave.ErrorOffset, 4),
{ NULL, "foseg", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.DataSelector), 2, 4},
REG(NULL, "fooff", FloatSave.DataOffset, 4),
{ NULL, "fop", FIELD_OFFSET(WOW64_CONTEXT, FloatSave.ErrorSelector) + 2, 2, 4},
{ "sse", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[0]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[1]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[2]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[3]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[4]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[5]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[6]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[7]), 16, 16},
{ NULL, FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, MxCsr), 4, 4},
{ "sse", "xmm0", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[0]), 16, 16},
{ NULL, "xmm1", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[1]), 16, 16},
{ NULL, "xmm2", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[2]), 16, 16},
{ NULL, "xmm3", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[3]), 16, 16},
{ NULL, "xmm4", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[4]), 16, 16},
{ NULL, "xmm5", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[5]), 16, 16},
{ NULL, "xmm6", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[6]), 16, 16},
{ NULL, "xmm7", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, XmmRegisters[7]), 16, 16},
{ NULL, "mxcsr", FIELD_OFFSET(WOW64_CONTEXT, ExtendedRegisters) + FIELD_OFFSET(XMM_SAVE_AREA32, MxCsr), 4, 4},
};
struct backend_cpu be_i386 =

144
programs/winedbg/be_ppc.c
View File

@ -191,81 +191,81 @@ static BOOL be_ppc_set_context(HANDLE thread, const dbg_ctx_t *ctx)
return SetThreadContext(thread, &ctx->ctx);
}
#define REG(f,r,gs) {f, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
#define REG(f,n,r,gs) {f, n, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
static struct gdb_register be_ppc_gdb_register_map[] = {
REG("core", Gpr0, 4),
REG(NULL, Gpr1, 4),
REG(NULL, Gpr2, 4),
REG(NULL, Gpr3, 4),
REG(NULL, Gpr4, 4),
REG(NULL, Gpr5, 4),
REG(NULL, Gpr6, 4),
REG(NULL, Gpr7, 4),
REG(NULL, Gpr8, 4),
REG(NULL, Gpr9, 4),
REG(NULL, Gpr10, 4),
REG(NULL, Gpr11, 4),
REG(NULL, Gpr12, 4),
REG(NULL, Gpr13, 4),
REG(NULL, Gpr14, 4),
REG(NULL, Gpr15, 4),
REG(NULL, Gpr16, 4),
REG(NULL, Gpr17, 4),
REG(NULL, Gpr18, 4),
REG(NULL, Gpr19, 4),
REG(NULL, Gpr20, 4),
REG(NULL, Gpr21, 4),
REG(NULL, Gpr22, 4),
REG(NULL, Gpr23, 4),
REG(NULL, Gpr24, 4),
REG(NULL, Gpr25, 4),
REG(NULL, Gpr26, 4),
REG(NULL, Gpr27, 4),
REG(NULL, Gpr28, 4),
REG(NULL, Gpr29, 4),
REG(NULL, Gpr30, 4),
REG(NULL, Gpr31, 4),
REG(NULL, Iar, 4),
REG(NULL, Msr, 4),
REG(NULL, Cr, 4),
REG(NULL, Lr, 4),
REG(NULL, Ctr, 4),
REG(NULL, Xer, 4),
REG("core", "r0", Gpr0, 4),
REG(NULL, "r1", Gpr1, 4),
REG(NULL, "r2", Gpr2, 4),
REG(NULL, "r3", Gpr3, 4),
REG(NULL, "r4", Gpr4, 4),
REG(NULL, "r5", Gpr5, 4),
REG(NULL, "r6", Gpr6, 4),
REG(NULL, "r7", Gpr7, 4),
REG(NULL, "r8", Gpr8, 4),
REG(NULL, "r9", Gpr9, 4),
REG(NULL, "r10", Gpr10, 4),
REG(NULL, "r11", Gpr11, 4),
REG(NULL, "r12", Gpr12, 4),
REG(NULL, "r13", Gpr13, 4),
REG(NULL, "r14", Gpr14, 4),
REG(NULL, "r15", Gpr15, 4),
REG(NULL, "r16", Gpr16, 4),
REG(NULL, "r17", Gpr17, 4),
REG(NULL, "r18", Gpr18, 4),
REG(NULL, "r19", Gpr19, 4),
REG(NULL, "r20", Gpr20, 4),
REG(NULL, "r21", Gpr21, 4),
REG(NULL, "r22", Gpr22, 4),
REG(NULL, "r23", Gpr23, 4),
REG(NULL, "r24", Gpr24, 4),
REG(NULL, "r25", Gpr25, 4),
REG(NULL, "r26", Gpr26, 4),
REG(NULL, "r27", Gpr27, 4),
REG(NULL, "r28", Gpr28, 4),
REG(NULL, "r29", Gpr29, 4),
REG(NULL, "r30", Gpr30, 4),
REG(NULL, "r31", Gpr31, 4),
REG(NULL, "pc", Iar, 4),
REG(NULL, "msr", Msr, 4),
REG(NULL, "cr", Cr, 4),
REG(NULL, "lr", Lr, 4),
REG(NULL, "ctr", Ctr, 4),
REG(NULL, "xer", Xer, 4),
REG("fpu", Fpr0, 4),
REG(NULL, Fpr1, 4),
REG(NULL, Fpr2, 4),
REG(NULL, Fpr3, 4),
REG(NULL, Fpr4, 4),
REG(NULL, Fpr5, 4),
REG(NULL, Fpr6, 4),
REG(NULL, Fpr7, 4),
REG(NULL, Fpr8, 4),
REG(NULL, Fpr9, 4),
REG(NULL, Fpr10, 4),
REG(NULL, Fpr11, 4),
REG(NULL, Fpr12, 4),
REG(NULL, Fpr13, 4),
REG(NULL, Fpr14, 4),
REG(NULL, Fpr15, 4),
REG(NULL, Fpr16, 4),
REG(NULL, Fpr17, 4),
REG(NULL, Fpr18, 4),
REG(NULL, Fpr19, 4),
REG(NULL, Fpr20, 4),
REG(NULL, Fpr21, 4),
REG(NULL, Fpr22, 4),
REG(NULL, Fpr23, 4),
REG(NULL, Fpr24, 4),
REG(NULL, Fpr25, 4),
REG(NULL, Fpr26, 4),
REG(NULL, Fpr27, 4),
REG(NULL, Fpr28, 4),
REG(NULL, Fpr29, 4),
REG(NULL, Fpr30, 4),
REG(NULL, Fpr31, 4),
REG(NULL, Fpscr, 4),
REG("fpu", "f0", Fpr0, 4),
REG(NULL, "f1", Fpr1, 4),
REG(NULL, "f2", Fpr2, 4),
REG(NULL, "f3", Fpr3, 4),
REG(NULL, "f4", Fpr4, 4),
REG(NULL, "f5", Fpr5, 4),
REG(NULL, "f6", Fpr6, 4),
REG(NULL, "f7", Fpr7, 4),
REG(NULL, "f8", Fpr8, 4),
REG(NULL, "f9", Fpr9, 4),
REG(NULL, "f10", Fpr10, 4),
REG(NULL, "f11", Fpr11, 4),
REG(NULL, "f12", Fpr12, 4),
REG(NULL, "f13", Fpr13, 4),
REG(NULL, "f14", Fpr14, 4),
REG(NULL, "f15", Fpr15, 4),
REG(NULL, "f16", Fpr16, 4),
REG(NULL, "f17", Fpr17, 4),
REG(NULL, "f18", Fpr18, 4),
REG(NULL, "f19", Fpr19, 4),
REG(NULL, "f20", Fpr20, 4),
REG(NULL, "f21", Fpr21, 4),
REG(NULL, "f22", Fpr22, 4),
REG(NULL, "f23", Fpr23, 4),
REG(NULL, "f24", Fpr24, 4),
REG(NULL, "f25", Fpr25, 4),
REG(NULL, "f26", Fpr26, 4),
REG(NULL, "f27", Fpr27, 4),
REG(NULL, "f28", Fpr28, 4),
REG(NULL, "f29", Fpr29, 4),
REG(NULL, "f30", Fpr30, 4),
REG(NULL, "f31", Fpr31, 4),
REG(NULL, "fpscr", Fpscr, 4),
/* FIXME: MQ is missing? FIELD_OFFSET(CONTEXT, Mq), */
/* see gdb/nlm/ppc.c */

116
programs/winedbg/be_x86_64.c
View File

@ -768,67 +768,67 @@ static BOOL be_x86_64_set_context(HANDLE thread, const dbg_ctx_t *ctx)
return SetThreadContext(thread, &ctx->ctx);
}
#define REG(f,r,gs) {f, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
#define REG(f,n,r,gs) {f, n, FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
static struct gdb_register be_x86_64_gdb_register_map[] = {
REG("core", Rax, 8),
REG(NULL, Rbx, 8),
REG(NULL, Rcx, 8),
REG(NULL, Rdx, 8),
REG(NULL, Rsi, 8),
REG(NULL, Rdi, 8),
REG(NULL, Rbp, 8),
REG(NULL, Rsp, 8),
REG(NULL, R8, 8),
REG(NULL, R9, 8),
REG(NULL, R10, 8),
REG(NULL, R11, 8),
REG(NULL, R12, 8),
REG(NULL, R13, 8),
REG(NULL, R14, 8),
REG(NULL, R15, 8),
REG(NULL, Rip, 8),
REG(NULL, EFlags, 4),
REG(NULL, SegCs, 4),
REG(NULL, SegSs, 4),
REG(NULL, SegDs, 4),
REG(NULL, SegEs, 4),
REG(NULL, SegFs, 4),
REG(NULL, SegGs, 4),
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 0]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 1]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 2]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 3]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 4]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 5]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 6]), 10, 10},
{ NULL, FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 7]), 10, 10},
REG(NULL, u.FltSave.ControlWord, 4),
REG(NULL, u.FltSave.StatusWord, 4),
REG(NULL, u.FltSave.TagWord, 4),
REG(NULL, u.FltSave.ErrorSelector, 4),
REG(NULL, u.FltSave.ErrorOffset, 4),
REG(NULL, u.FltSave.DataSelector, 4),
REG(NULL, u.FltSave.DataOffset, 4),
REG(NULL, u.FltSave.ErrorOpcode, 4),
REG("core", "rax", Rax, 8),
REG(NULL, "rbx", Rbx, 8),
REG(NULL, "rcx", Rcx, 8),
REG(NULL, "rdx", Rdx, 8),
REG(NULL, "rsi", Rsi, 8),
REG(NULL, "rdi", Rdi, 8),
REG(NULL, "rbp", Rbp, 8),
REG(NULL, "rsp", Rsp, 8),
REG(NULL, "r8", R8, 8),
REG(NULL, "r9", R9, 8),
REG(NULL, "r10", R10, 8),
REG(NULL, "r11", R11, 8),
REG(NULL, "r12", R12, 8),
REG(NULL, "r13", R13, 8),
REG(NULL, "r14", R14, 8),
REG(NULL, "r15", R15, 8),
REG(NULL, "rip", Rip, 8),
REG(NULL, "eflags", EFlags, 4),
REG(NULL, "cs", SegCs, 4),
REG(NULL, "ss", SegSs, 4),
REG(NULL, "ds", SegDs, 4),
REG(NULL, "es", SegEs, 4),
REG(NULL, "fs", SegFs, 4),
REG(NULL, "gs", SegGs, 4),
{ NULL, "st0", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 0]), 10, 10},
{ NULL, "st1", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 1]), 10, 10},
{ NULL, "st2", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 2]), 10, 10},
{ NULL, "st3", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 3]), 10, 10},
{ NULL, "st4", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 4]), 10, 10},
{ NULL, "st5", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 5]), 10, 10},
{ NULL, "st6", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 6]), 10, 10},
{ NULL, "st7", FIELD_OFFSET(CONTEXT, u.FltSave.FloatRegisters[ 7]), 10, 10},
REG(NULL, "fctrl", u.FltSave.ControlWord, 4),
REG(NULL, "fstat", u.FltSave.StatusWord, 4),
REG(NULL, "ftag", u.FltSave.TagWord, 4),
REG(NULL, "fiseg", u.FltSave.ErrorSelector, 4),
REG(NULL, "fioff", u.FltSave.ErrorOffset, 4),
REG(NULL, "foseg", u.FltSave.DataSelector, 4),
REG(NULL, "fooff", u.FltSave.DataOffset, 4),
REG(NULL, "fop", u.FltSave.ErrorOpcode, 4),
REG("sse", u.s.Xmm0, 16),
REG(NULL, u.s.Xmm1, 16),
REG(NULL, u.s.Xmm2, 16),
REG(NULL, u.s.Xmm3, 16),
REG(NULL, u.s.Xmm4, 16),
REG(NULL, u.s.Xmm5, 16),
REG(NULL, u.s.Xmm6, 16),
REG(NULL, u.s.Xmm7, 16),
REG(NULL, u.s.Xmm8, 16),
REG(NULL, u.s.Xmm9, 16),
REG(NULL, u.s.Xmm10, 16),
REG(NULL, u.s.Xmm11, 16),
REG(NULL, u.s.Xmm12, 16),
REG(NULL, u.s.Xmm13, 16),
REG(NULL, u.s.Xmm14, 16),
REG(NULL, u.s.Xmm15, 16),
REG(NULL, u.FltSave.MxCsr, 4),
REG("sse", "xmm0", u.s.Xmm0, 16),
REG(NULL, "xmm1", u.s.Xmm1, 16),
REG(NULL, "xmm2", u.s.Xmm2, 16),
REG(NULL, "xmm3", u.s.Xmm3, 16),
REG(NULL, "xmm4", u.s.Xmm4, 16),
REG(NULL, "xmm5", u.s.Xmm5, 16),
REG(NULL, "xmm6", u.s.Xmm6, 16),
REG(NULL, "xmm7", u.s.Xmm7, 16),
REG(NULL, "xmm8", u.s.Xmm8, 16),
REG(NULL, "xmm9", u.s.Xmm9, 16),
REG(NULL, "xmm10", u.s.Xmm10, 16),
REG(NULL, "xmm11", u.s.Xmm11, 16),
REG(NULL, "xmm12", u.s.Xmm12, 16),
REG(NULL, "xmm13", u.s.Xmm13, 16),
REG(NULL, "xmm14", u.s.Xmm14, 16),
REG(NULL, "xmm15", u.s.Xmm15, 16),
REG(NULL, "mxcsr", u.FltSave.MxCsr, 4),
};
struct backend_cpu be_x86_64 =