2011-11-14 20:45:25 +01:00
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/*
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* Copyright 2011 Henri Verbeet for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*
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*/
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#include "d3d10_private.h"
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WINE_DEFAULT_DEBUG_CHANNEL(d3d10);
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struct d3d10_stateblock
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{
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ID3D10StateBlock ID3D10StateBlock_iface;
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LONG refcount;
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2014-09-01 12:42:59 +02:00
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ID3D10Device *device;
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D3D10_STATE_BLOCK_MASK mask;
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ID3D10VertexShader *vs;
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ID3D10SamplerState *vs_samplers[D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT];
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ID3D10ShaderResourceView *vs_resources[D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT];
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ID3D10Buffer *vs_cbs[D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT];
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ID3D10GeometryShader *gs;
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ID3D10SamplerState *gs_samplers[D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT];
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ID3D10ShaderResourceView *gs_resources[D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT];
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ID3D10Buffer *gs_cbs[D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT];
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ID3D10PixelShader *ps;
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ID3D10SamplerState *ps_samplers[D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT];
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ID3D10ShaderResourceView *ps_resources[D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT];
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ID3D10Buffer *ps_cbs[D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT];
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ID3D10Buffer *vbs[D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT];
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UINT vb_strides[D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT];
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UINT vb_offsets[D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT];
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ID3D10Buffer *ib;
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DXGI_FORMAT ib_format;
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UINT ib_offset;
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ID3D10InputLayout *il;
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D3D10_PRIMITIVE_TOPOLOGY topology;
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ID3D10RenderTargetView *rtvs[D3D10_SIMULTANEOUS_RENDER_TARGET_COUNT];
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ID3D10DepthStencilView *dsv;
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ID3D10DepthStencilState *dss;
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2014-09-18 10:56:25 +02:00
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UINT stencil_ref;
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2014-09-01 12:42:59 +02:00
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ID3D10BlendState *bs;
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float blend_factor[4];
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UINT sample_mask;
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D3D10_VIEWPORT vps[D3D10_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
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D3D10_RECT scissor_rects[D3D10_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
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ID3D10RasterizerState *rs;
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ID3D10Buffer *so_buffers[D3D10_SO_BUFFER_SLOT_COUNT];
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UINT so_offsets[D3D10_SO_BUFFER_SLOT_COUNT];
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ID3D10Predicate *predicate;
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BOOL predicate_value;
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2011-11-14 20:45:25 +01:00
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};
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2019-10-30 15:01:33 +01:00
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#define WINE_D3D10_TO_STR(x) case x: return #x
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static const char *debug_d3d10_device_state_types(D3D10_DEVICE_STATE_TYPES t)
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{
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switch (t)
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{
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WINE_D3D10_TO_STR(D3D10_DST_SO_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_OM_RENDER_TARGETS);
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2021-10-06 09:53:34 +02:00
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WINE_D3D10_TO_STR(D3D10_DST_OM_DEPTH_STENCIL_STATE);
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WINE_D3D10_TO_STR(D3D10_DST_OM_BLEND_STATE);
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2019-10-30 15:01:33 +01:00
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WINE_D3D10_TO_STR(D3D10_DST_VS);
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WINE_D3D10_TO_STR(D3D10_DST_VS_SAMPLERS);
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WINE_D3D10_TO_STR(D3D10_DST_VS_SHADER_RESOURCES);
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WINE_D3D10_TO_STR(D3D10_DST_VS_CONSTANT_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_GS);
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WINE_D3D10_TO_STR(D3D10_DST_GS_SAMPLERS);
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WINE_D3D10_TO_STR(D3D10_DST_GS_SHADER_RESOURCES);
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WINE_D3D10_TO_STR(D3D10_DST_GS_CONSTANT_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_PS);
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WINE_D3D10_TO_STR(D3D10_DST_PS_SAMPLERS);
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WINE_D3D10_TO_STR(D3D10_DST_PS_SHADER_RESOURCES);
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WINE_D3D10_TO_STR(D3D10_DST_PS_CONSTANT_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_IA_VERTEX_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_IA_INDEX_BUFFER);
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WINE_D3D10_TO_STR(D3D10_DST_IA_INPUT_LAYOUT);
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WINE_D3D10_TO_STR(D3D10_DST_IA_PRIMITIVE_TOPOLOGY);
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WINE_D3D10_TO_STR(D3D10_DST_RS_VIEWPORTS);
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WINE_D3D10_TO_STR(D3D10_DST_RS_SCISSOR_RECTS);
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WINE_D3D10_TO_STR(D3D10_DST_RS_RASTERIZER_STATE);
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WINE_D3D10_TO_STR(D3D10_DST_PREDICATION);
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default:
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FIXME("Unrecognised D3D10_DEVICE_STATE_TYPES %#x.\n", t);
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return "unrecognised";
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}
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}
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#undef WINE_D3D10_TO_STR
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2011-11-14 20:45:25 +01:00
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static inline struct d3d10_stateblock *impl_from_ID3D10StateBlock(ID3D10StateBlock *iface)
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{
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return CONTAINING_RECORD(iface, struct d3d10_stateblock, ID3D10StateBlock_iface);
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}
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2014-09-01 12:42:59 +02:00
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static void stateblock_cleanup(struct d3d10_stateblock *stateblock)
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{
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unsigned int i;
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if (stateblock->vs)
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{
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ID3D10VertexShader_Release(stateblock->vs);
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stateblock->vs = NULL;
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}
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for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
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{
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if (stateblock->vs_samplers[i])
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{
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ID3D10SamplerState_Release(stateblock->vs_samplers[i]);
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stateblock->vs_samplers[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
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{
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if (stateblock->vs_resources[i])
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{
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ID3D10ShaderResourceView_Release(stateblock->vs_resources[i]);
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stateblock->vs_resources[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
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{
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if (stateblock->vs_cbs[i])
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{
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ID3D10Buffer_Release(stateblock->vs_cbs[i]);
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stateblock->vs_cbs[i] = NULL;
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}
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}
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if (stateblock->gs)
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{
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ID3D10GeometryShader_Release(stateblock->gs);
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stateblock->gs = NULL;
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}
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for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
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{
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if (stateblock->gs_samplers[i])
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{
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ID3D10SamplerState_Release(stateblock->gs_samplers[i]);
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stateblock->gs_samplers[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
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{
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if (stateblock->gs_resources[i])
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{
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ID3D10ShaderResourceView_Release(stateblock->gs_resources[i]);
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stateblock->gs_resources[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
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{
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if (stateblock->gs_cbs[i])
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{
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ID3D10Buffer_Release(stateblock->gs_cbs[i]);
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stateblock->gs_cbs[i] = NULL;
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}
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}
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if (stateblock->ps)
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{
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ID3D10PixelShader_Release(stateblock->ps);
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stateblock->ps = NULL;
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}
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for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
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{
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if (stateblock->ps_samplers[i])
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{
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ID3D10SamplerState_Release(stateblock->ps_samplers[i]);
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stateblock->ps_samplers[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
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{
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if (stateblock->ps_resources[i])
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{
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ID3D10ShaderResourceView_Release(stateblock->ps_resources[i]);
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stateblock->ps_resources[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
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{
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if (stateblock->ps_cbs[i])
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{
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ID3D10Buffer_Release(stateblock->ps_cbs[i]);
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stateblock->ps_cbs[i] = NULL;
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}
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}
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for (i = 0; i < D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT; ++i)
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{
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if (stateblock->vbs[i])
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{
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ID3D10Buffer_Release(stateblock->vbs[i]);
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stateblock->vbs[i] = NULL;
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}
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}
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if (stateblock->ib)
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{
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ID3D10Buffer_Release(stateblock->ib);
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stateblock->ib = NULL;
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}
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if (stateblock->il)
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{
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ID3D10InputLayout_Release(stateblock->il);
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stateblock->il = NULL;
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}
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for (i = 0; i < D3D10_SIMULTANEOUS_RENDER_TARGET_COUNT; ++i)
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{
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if (stateblock->rtvs[i])
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{
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ID3D10RenderTargetView_Release(stateblock->rtvs[i]);
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stateblock->rtvs[i] = NULL;
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}
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}
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if (stateblock->dsv)
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{
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ID3D10DepthStencilView_Release(stateblock->dsv);
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stateblock->dsv = NULL;
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}
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2014-09-18 10:56:25 +02:00
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if (stateblock->dss)
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{
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ID3D10DepthStencilState_Release(stateblock->dss);
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stateblock->dss = NULL;
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}
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2014-09-01 12:42:59 +02:00
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if (stateblock->bs)
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{
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ID3D10BlendState_Release(stateblock->bs);
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stateblock->bs = NULL;
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}
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if (stateblock->rs)
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{
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ID3D10RasterizerState_Release(stateblock->rs);
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stateblock->rs = NULL;
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}
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for (i = 0; i < D3D10_SO_BUFFER_SLOT_COUNT; ++i)
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{
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if (stateblock->so_buffers[i])
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{
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ID3D10Buffer_Release(stateblock->so_buffers[i]);
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stateblock->so_buffers[i] = NULL;
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}
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}
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if (stateblock->predicate)
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{
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ID3D10Predicate_Release(stateblock->predicate);
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stateblock->predicate = NULL;
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}
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}
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2011-11-14 20:45:25 +01:00
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static HRESULT STDMETHODCALLTYPE d3d10_stateblock_QueryInterface(ID3D10StateBlock *iface, REFIID iid, void **object)
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{
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struct d3d10_stateblock *stateblock;
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TRACE("iface %p, iid %s, object %p.\n", iface, debugstr_guid(iid), object);
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stateblock = impl_from_ID3D10StateBlock(iface);
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if (IsEqualGUID(iid, &IID_ID3D10StateBlock)
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|| IsEqualGUID(iid, &IID_IUnknown))
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{
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IUnknown_AddRef(&stateblock->ID3D10StateBlock_iface);
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*object = &stateblock->ID3D10StateBlock_iface;
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return S_OK;
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}
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WARN("%s not implemented, returning E_NOINTERFACE.\n", debugstr_guid(iid));
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*object = NULL;
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return E_NOINTERFACE;
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}
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static ULONG STDMETHODCALLTYPE d3d10_stateblock_AddRef(ID3D10StateBlock *iface)
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{
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struct d3d10_stateblock *stateblock = impl_from_ID3D10StateBlock(iface);
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ULONG refcount = InterlockedIncrement(&stateblock->refcount);
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TRACE("%p increasing refcount to %u.\n", stateblock, refcount);
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return refcount;
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}
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static ULONG STDMETHODCALLTYPE d3d10_stateblock_Release(ID3D10StateBlock *iface)
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{
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struct d3d10_stateblock *stateblock = impl_from_ID3D10StateBlock(iface);
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ULONG refcount = InterlockedDecrement(&stateblock->refcount);
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TRACE("%p decreasing refcount to %u.\n", stateblock, refcount);
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if (!refcount)
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2014-09-01 12:42:59 +02:00
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{
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stateblock_cleanup(stateblock);
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2017-10-12 16:17:09 +02:00
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ID3D10Device_Release(stateblock->device);
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2018-02-01 00:37:36 +01:00
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heap_free(stateblock);
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2014-09-01 12:42:59 +02:00
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}
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2011-11-14 20:45:25 +01:00
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return refcount;
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}
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static HRESULT STDMETHODCALLTYPE d3d10_stateblock_Capture(ID3D10StateBlock *iface)
|
|
|
|
{
|
2014-09-01 12:42:59 +02:00
|
|
|
unsigned int vp_count = D3D10_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE;
|
|
|
|
struct d3d10_stateblock *stateblock = impl_from_ID3D10StateBlock(iface);
|
|
|
|
unsigned int i;
|
2011-11-14 20:45:25 +01:00
|
|
|
|
2014-09-01 12:42:59 +02:00
|
|
|
TRACE("iface %p.\n", iface);
|
|
|
|
|
|
|
|
stateblock_cleanup(stateblock);
|
|
|
|
|
|
|
|
if (stateblock->mask.VS)
|
|
|
|
ID3D10Device_VSGetShader(stateblock->device, &stateblock->vs);
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.VSSamplers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_VSGetSamplers(stateblock->device, i, 1, &stateblock->vs_samplers[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.VSShaderResources[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_VSGetShaderResources(stateblock->device, i, 1, &stateblock->vs_resources[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.VSConstantBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_VSGetConstantBuffers(stateblock->device, i, 1, &stateblock->vs_cbs[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stateblock->mask.GS)
|
|
|
|
ID3D10Device_GSGetShader(stateblock->device, &stateblock->gs);
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.GSSamplers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_GSGetSamplers(stateblock->device, i, 1, &stateblock->gs_samplers[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.GSShaderResources[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_GSGetShaderResources(stateblock->device, i, 1, &stateblock->gs_resources[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.GSConstantBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_GSGetConstantBuffers(stateblock->device, i, 1, &stateblock->gs_cbs[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stateblock->mask.PS)
|
|
|
|
ID3D10Device_PSGetShader(stateblock->device, &stateblock->ps);
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.PSSamplers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_PSGetSamplers(stateblock->device, i, 1, &stateblock->ps_samplers[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.PSShaderResources[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_PSGetShaderResources(stateblock->device, i, 1, &stateblock->ps_resources[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.PSConstantBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_PSGetConstantBuffers(stateblock->device, i, 1, &stateblock->ps_cbs[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.IAVertexBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_IAGetVertexBuffers(stateblock->device, i, 1, &stateblock->vbs[i],
|
|
|
|
&stateblock->vb_strides[i], &stateblock->vb_offsets[i]);
|
|
|
|
}
|
|
|
|
if (stateblock->mask.IAIndexBuffer)
|
|
|
|
ID3D10Device_IAGetIndexBuffer(stateblock->device, &stateblock->ib,
|
|
|
|
&stateblock->ib_format, &stateblock->ib_offset);
|
|
|
|
if (stateblock->mask.IAInputLayout)
|
|
|
|
ID3D10Device_IAGetInputLayout(stateblock->device, &stateblock->il);
|
|
|
|
if (stateblock->mask.IAPrimitiveTopology)
|
|
|
|
ID3D10Device_IAGetPrimitiveTopology(stateblock->device, &stateblock->topology);
|
|
|
|
|
|
|
|
if (stateblock->mask.OMRenderTargets)
|
|
|
|
ID3D10Device_OMGetRenderTargets(stateblock->device, D3D10_SIMULTANEOUS_RENDER_TARGET_COUNT,
|
|
|
|
stateblock->rtvs, &stateblock->dsv);
|
2014-09-18 10:56:25 +02:00
|
|
|
if (stateblock->mask.OMDepthStencilState)
|
|
|
|
ID3D10Device_OMGetDepthStencilState(stateblock->device, &stateblock->dss, &stateblock->stencil_ref);
|
2014-09-01 12:42:59 +02:00
|
|
|
if (stateblock->mask.OMBlendState)
|
|
|
|
ID3D10Device_OMGetBlendState(stateblock->device, &stateblock->bs,
|
|
|
|
stateblock->blend_factor, &stateblock->sample_mask);
|
|
|
|
|
|
|
|
if (stateblock->mask.RSViewports)
|
|
|
|
ID3D10Device_RSGetViewports(stateblock->device, &vp_count, stateblock->vps);
|
|
|
|
if (stateblock->mask.RSScissorRects)
|
|
|
|
ID3D10Device_RSGetScissorRects(stateblock->device, &vp_count, stateblock->scissor_rects);
|
|
|
|
if (stateblock->mask.RSRasterizerState)
|
|
|
|
ID3D10Device_RSGetState(stateblock->device, &stateblock->rs);
|
|
|
|
|
|
|
|
if (stateblock->mask.SOBuffers)
|
|
|
|
ID3D10Device_SOGetTargets(stateblock->device, D3D10_SO_BUFFER_SLOT_COUNT,
|
|
|
|
stateblock->so_buffers, stateblock->so_offsets);
|
|
|
|
|
|
|
|
if (stateblock->mask.Predication)
|
|
|
|
ID3D10Device_GetPredication(stateblock->device, &stateblock->predicate, &stateblock->predicate_value);
|
|
|
|
|
|
|
|
return S_OK;
|
2011-11-14 20:45:25 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static HRESULT STDMETHODCALLTYPE d3d10_stateblock_Apply(ID3D10StateBlock *iface)
|
|
|
|
{
|
2014-09-03 07:48:19 +02:00
|
|
|
struct d3d10_stateblock *stateblock = impl_from_ID3D10StateBlock(iface);
|
|
|
|
unsigned int i;
|
2011-11-14 20:45:25 +01:00
|
|
|
|
2014-09-03 07:48:19 +02:00
|
|
|
TRACE("iface %p.\n", iface);
|
|
|
|
|
|
|
|
if (stateblock->mask.VS)
|
|
|
|
ID3D10Device_VSSetShader(stateblock->device, stateblock->vs);
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.VSSamplers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_VSSetSamplers(stateblock->device, i, 1, &stateblock->vs_samplers[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.VSShaderResources[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_VSSetShaderResources(stateblock->device, i, 1, &stateblock->vs_resources[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.VSConstantBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_VSSetConstantBuffers(stateblock->device, i, 1, &stateblock->vs_cbs[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stateblock->mask.GS)
|
|
|
|
ID3D10Device_GSSetShader(stateblock->device, stateblock->gs);
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.GSSamplers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_GSSetSamplers(stateblock->device, i, 1, &stateblock->gs_samplers[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.GSShaderResources[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_GSSetShaderResources(stateblock->device, i, 1, &stateblock->gs_resources[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.GSConstantBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_GSSetConstantBuffers(stateblock->device, i, 1, &stateblock->gs_cbs[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stateblock->mask.PS)
|
|
|
|
ID3D10Device_PSSetShader(stateblock->device, stateblock->ps);
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.PSSamplers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_PSSetSamplers(stateblock->device, i, 1, &stateblock->ps_samplers[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.PSShaderResources[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_PSSetShaderResources(stateblock->device, i, 1, &stateblock->ps_resources[i]);
|
|
|
|
}
|
|
|
|
for (i = 0; i < D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.PSConstantBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_PSSetConstantBuffers(stateblock->device, i, 1, &stateblock->ps_cbs[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT; ++i)
|
|
|
|
{
|
|
|
|
if (stateblock->mask.IAVertexBuffers[i >> 3] & (1 << (i & 7)))
|
|
|
|
ID3D10Device_IASetVertexBuffers(stateblock->device, i, 1, &stateblock->vbs[i],
|
|
|
|
&stateblock->vb_strides[i], &stateblock->vb_offsets[i]);
|
|
|
|
}
|
|
|
|
if (stateblock->mask.IAIndexBuffer)
|
|
|
|
ID3D10Device_IASetIndexBuffer(stateblock->device, stateblock->ib,
|
|
|
|
stateblock->ib_format, stateblock->ib_offset);
|
|
|
|
if (stateblock->mask.IAInputLayout)
|
|
|
|
ID3D10Device_IASetInputLayout(stateblock->device, stateblock->il);
|
|
|
|
if (stateblock->mask.IAPrimitiveTopology)
|
|
|
|
ID3D10Device_IASetPrimitiveTopology(stateblock->device, stateblock->topology);
|
|
|
|
|
|
|
|
if (stateblock->mask.OMRenderTargets)
|
|
|
|
ID3D10Device_OMSetRenderTargets(stateblock->device, D3D10_SIMULTANEOUS_RENDER_TARGET_COUNT,
|
|
|
|
stateblock->rtvs, stateblock->dsv);
|
2014-09-18 10:56:25 +02:00
|
|
|
if (stateblock->mask.OMDepthStencilState)
|
|
|
|
ID3D10Device_OMSetDepthStencilState(stateblock->device, stateblock->dss, stateblock->stencil_ref);
|
2014-09-03 07:48:19 +02:00
|
|
|
if (stateblock->mask.OMBlendState)
|
|
|
|
ID3D10Device_OMSetBlendState(stateblock->device, stateblock->bs,
|
|
|
|
stateblock->blend_factor, stateblock->sample_mask);
|
|
|
|
|
|
|
|
if (stateblock->mask.RSViewports)
|
|
|
|
ID3D10Device_RSSetViewports(stateblock->device, D3D10_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE,
|
|
|
|
stateblock->vps);
|
|
|
|
if (stateblock->mask.RSScissorRects)
|
|
|
|
ID3D10Device_RSSetScissorRects(stateblock->device, D3D10_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE,
|
|
|
|
stateblock->scissor_rects);
|
|
|
|
if (stateblock->mask.RSRasterizerState)
|
|
|
|
ID3D10Device_RSSetState(stateblock->device, stateblock->rs);
|
|
|
|
|
|
|
|
if (stateblock->mask.SOBuffers)
|
|
|
|
ID3D10Device_SOSetTargets(stateblock->device, D3D10_SO_BUFFER_SLOT_COUNT,
|
|
|
|
stateblock->so_buffers, stateblock->so_offsets);
|
|
|
|
|
|
|
|
if (stateblock->mask.Predication)
|
|
|
|
ID3D10Device_SetPredication(stateblock->device, stateblock->predicate, stateblock->predicate_value);
|
|
|
|
|
|
|
|
return S_OK;
|
2011-11-14 20:45:25 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static HRESULT STDMETHODCALLTYPE d3d10_stateblock_ReleaseAllDeviceObjects(ID3D10StateBlock *iface)
|
|
|
|
{
|
|
|
|
FIXME("iface %p stub!\n", iface);
|
|
|
|
|
|
|
|
return E_NOTIMPL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static HRESULT STDMETHODCALLTYPE d3d10_stateblock_GetDevice(ID3D10StateBlock *iface, ID3D10Device **device)
|
|
|
|
{
|
|
|
|
FIXME("iface %p, device %p stub!\n", iface, device);
|
|
|
|
|
|
|
|
return E_NOTIMPL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct ID3D10StateBlockVtbl d3d10_stateblock_vtbl =
|
|
|
|
{
|
|
|
|
/* IUnknown methods */
|
|
|
|
d3d10_stateblock_QueryInterface,
|
|
|
|
d3d10_stateblock_AddRef,
|
|
|
|
d3d10_stateblock_Release,
|
|
|
|
/* ID3D10StateBlock methods */
|
|
|
|
d3d10_stateblock_Capture,
|
|
|
|
d3d10_stateblock_Apply,
|
|
|
|
d3d10_stateblock_ReleaseAllDeviceObjects,
|
|
|
|
d3d10_stateblock_GetDevice,
|
|
|
|
};
|
|
|
|
|
|
|
|
HRESULT WINAPI D3D10CreateStateBlock(ID3D10Device *device,
|
|
|
|
D3D10_STATE_BLOCK_MASK *mask, ID3D10StateBlock **stateblock)
|
|
|
|
{
|
|
|
|
struct d3d10_stateblock *object;
|
|
|
|
|
2015-02-12 09:34:56 +01:00
|
|
|
TRACE("device %p, mask %p, stateblock %p.\n", device, mask, stateblock);
|
2011-11-14 20:45:25 +01:00
|
|
|
|
2018-02-01 00:37:36 +01:00
|
|
|
if (!(object = heap_alloc_zero(sizeof(*object))))
|
2011-11-14 20:45:25 +01:00
|
|
|
{
|
|
|
|
ERR("Failed to allocate D3D10 stateblock object memory.\n");
|
|
|
|
return E_OUTOFMEMORY;
|
|
|
|
}
|
|
|
|
|
|
|
|
object->ID3D10StateBlock_iface.lpVtbl = &d3d10_stateblock_vtbl;
|
|
|
|
object->refcount = 1;
|
|
|
|
|
2014-09-01 12:42:59 +02:00
|
|
|
object->device = device;
|
|
|
|
ID3D10Device_AddRef(object->device);
|
|
|
|
object->mask = *mask;
|
|
|
|
|
2011-11-14 20:45:25 +01:00
|
|
|
TRACE("Created stateblock %p.\n", object);
|
|
|
|
*stateblock = &object->ID3D10StateBlock_iface;
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
2011-11-14 21:11:41 +01:00
|
|
|
|
2011-11-16 20:08:04 +01:00
|
|
|
static BOOL stateblock_mask_get_bit(BYTE *field, UINT field_size, UINT idx)
|
|
|
|
{
|
|
|
|
if (idx >= field_size)
|
|
|
|
return FALSE;
|
|
|
|
|
|
|
|
return field[idx >> 3] & (1 << (idx & 7));
|
|
|
|
}
|
|
|
|
|
2011-11-16 20:08:03 +01:00
|
|
|
static HRESULT stateblock_mask_set_bits(BYTE *field, UINT field_size, UINT start_bit, UINT count)
|
|
|
|
{
|
|
|
|
UINT end_bit = start_bit + count;
|
|
|
|
BYTE start_mask = 0xff << (start_bit & 7);
|
|
|
|
BYTE end_mask = 0x7f >> (~end_bit & 7);
|
|
|
|
UINT start_idx = start_bit >> 3;
|
|
|
|
UINT end_idx = end_bit >> 3;
|
|
|
|
|
|
|
|
if (start_bit >= field_size || field_size - start_bit < count)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
if (start_idx == end_idx)
|
|
|
|
{
|
|
|
|
field[start_idx] |= start_mask & end_mask;
|
|
|
|
return S_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (start_bit & 7)
|
|
|
|
{
|
|
|
|
field[start_idx] |= start_mask;
|
|
|
|
++start_idx;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&field[start_idx], 0xff, end_idx - start_idx);
|
|
|
|
|
|
|
|
if (end_bit & 7)
|
|
|
|
field[end_idx] |= end_mask;
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
|
|
|
|
2011-11-14 20:45:25 +01:00
|
|
|
static HRESULT stateblock_mask_clear_bits(BYTE *field, UINT field_size, UINT start_bit, UINT count)
|
|
|
|
{
|
|
|
|
UINT end_bit = start_bit + count;
|
|
|
|
BYTE start_mask = 0x7f >> (~start_bit & 7);
|
|
|
|
BYTE end_mask = 0xff << (end_bit & 7);
|
|
|
|
UINT start_idx = start_bit >> 3;
|
|
|
|
UINT end_idx = end_bit >> 3;
|
|
|
|
|
|
|
|
if (start_bit >= field_size || field_size - start_bit < count)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
if (start_idx == end_idx)
|
|
|
|
{
|
|
|
|
field[start_idx] &= start_mask | end_mask;
|
|
|
|
return S_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (start_bit & 7)
|
|
|
|
{
|
|
|
|
field[start_idx] &= start_mask;
|
|
|
|
++start_idx;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&field[start_idx], 0, end_idx - start_idx);
|
|
|
|
|
|
|
|
if (end_bit & 7)
|
|
|
|
field[end_idx] &= end_mask;
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
|
|
|
|
2011-11-14 21:11:41 +01:00
|
|
|
HRESULT WINAPI D3D10StateBlockMaskDifference(D3D10_STATE_BLOCK_MASK *mask_x,
|
|
|
|
D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result)
|
|
|
|
{
|
|
|
|
UINT count = sizeof(*result) / sizeof(DWORD);
|
|
|
|
UINT i;
|
|
|
|
|
|
|
|
TRACE("mask_x %p, mask_y %p, result %p.\n", mask_x, mask_y, result);
|
|
|
|
|
|
|
|
if (!mask_x || !mask_y || !result)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
for (i = 0; i < count; ++i)
|
|
|
|
{
|
|
|
|
((DWORD *)result)[i] = ((DWORD *)mask_x)[i] ^ ((DWORD *)mask_y)[i];
|
|
|
|
}
|
|
|
|
for (i = count * sizeof(DWORD); i < sizeof(*result); ++i)
|
|
|
|
{
|
|
|
|
((BYTE *)result)[i] = ((BYTE *)mask_x)[i] ^ ((BYTE *)mask_y)[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
2011-11-15 21:18:24 +01:00
|
|
|
|
|
|
|
HRESULT WINAPI D3D10StateBlockMaskDisableAll(D3D10_STATE_BLOCK_MASK *mask)
|
|
|
|
{
|
|
|
|
TRACE("mask %p.\n", mask);
|
|
|
|
|
|
|
|
if (!mask)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
memset(mask, 0, sizeof(*mask));
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
2011-11-14 20:45:25 +01:00
|
|
|
|
|
|
|
HRESULT WINAPI D3D10StateBlockMaskDisableCapture(D3D10_STATE_BLOCK_MASK *mask,
|
|
|
|
D3D10_DEVICE_STATE_TYPES state_type, UINT start_idx, UINT count)
|
|
|
|
{
|
|
|
|
TRACE("mask %p state_type %s, start_idx %u, count %u.\n",
|
|
|
|
mask, debug_d3d10_device_state_types(state_type), start_idx, count);
|
|
|
|
|
|
|
|
if (!mask)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
switch (state_type)
|
|
|
|
{
|
|
|
|
case D3D10_DST_SO_BUFFERS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->SOBuffers, 1, start_idx, count);
|
|
|
|
case D3D10_DST_OM_RENDER_TARGETS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->OMRenderTargets, 1, start_idx, count);
|
2021-10-06 09:53:34 +02:00
|
|
|
case D3D10_DST_OM_DEPTH_STENCIL_STATE:
|
2011-11-14 20:45:25 +01:00
|
|
|
return stateblock_mask_clear_bits(&mask->OMDepthStencilState, 1, start_idx, count);
|
2021-10-06 09:53:34 +02:00
|
|
|
case D3D10_DST_OM_BLEND_STATE:
|
2011-11-14 20:45:25 +01:00
|
|
|
return stateblock_mask_clear_bits(&mask->OMBlendState, 1, start_idx, count);
|
|
|
|
case D3D10_DST_VS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->VS, 1, start_idx, count);
|
|
|
|
case D3D10_DST_VS_SAMPLERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->VSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_VS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_clear_bits(mask->VSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_VS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->VSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_GS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->GS, 1, start_idx, count);
|
|
|
|
case D3D10_DST_GS_SAMPLERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->GSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_GS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_clear_bits(mask->GSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_GS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->GSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_PS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->PS, 1, start_idx, count);
|
|
|
|
case D3D10_DST_PS_SAMPLERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->PSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_PS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_clear_bits(mask->PSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_PS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->PSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_IA_VERTEX_BUFFERS:
|
|
|
|
return stateblock_mask_clear_bits(mask->IAVertexBuffers,
|
|
|
|
D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_IA_INDEX_BUFFER:
|
|
|
|
return stateblock_mask_clear_bits(&mask->IAIndexBuffer, 1, start_idx, count);
|
|
|
|
case D3D10_DST_IA_INPUT_LAYOUT:
|
|
|
|
return stateblock_mask_clear_bits(&mask->IAInputLayout, 1, start_idx, count);
|
|
|
|
case D3D10_DST_IA_PRIMITIVE_TOPOLOGY:
|
|
|
|
return stateblock_mask_clear_bits(&mask->IAPrimitiveTopology, 1, start_idx, count);
|
|
|
|
case D3D10_DST_RS_VIEWPORTS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->RSViewports, 1, start_idx, count);
|
|
|
|
case D3D10_DST_RS_SCISSOR_RECTS:
|
|
|
|
return stateblock_mask_clear_bits(&mask->RSScissorRects, 1, start_idx, count);
|
|
|
|
case D3D10_DST_RS_RASTERIZER_STATE:
|
|
|
|
return stateblock_mask_clear_bits(&mask->RSRasterizerState, 1, start_idx, count);
|
|
|
|
case D3D10_DST_PREDICATION:
|
|
|
|
return stateblock_mask_clear_bits(&mask->Predication, 1, start_idx, count);
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled state_type %#x.\n", state_type);
|
|
|
|
return E_INVALIDARG;
|
|
|
|
}
|
|
|
|
}
|
2011-11-15 21:18:26 +01:00
|
|
|
|
|
|
|
HRESULT WINAPI D3D10StateBlockMaskEnableAll(D3D10_STATE_BLOCK_MASK *mask)
|
|
|
|
{
|
|
|
|
TRACE("mask %p.\n", mask);
|
|
|
|
|
|
|
|
if (!mask)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
memset(mask, 0xff, sizeof(*mask));
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
2011-11-16 20:08:03 +01:00
|
|
|
|
|
|
|
HRESULT WINAPI D3D10StateBlockMaskEnableCapture(D3D10_STATE_BLOCK_MASK *mask,
|
|
|
|
D3D10_DEVICE_STATE_TYPES state_type, UINT start_idx, UINT count)
|
|
|
|
{
|
|
|
|
TRACE("mask %p state_type %s, start_idx %u, count %u.\n",
|
|
|
|
mask, debug_d3d10_device_state_types(state_type), start_idx, count);
|
|
|
|
|
|
|
|
if (!mask)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
switch (state_type)
|
|
|
|
{
|
|
|
|
case D3D10_DST_SO_BUFFERS:
|
|
|
|
return stateblock_mask_set_bits(&mask->SOBuffers, 1, start_idx, count);
|
|
|
|
case D3D10_DST_OM_RENDER_TARGETS:
|
|
|
|
return stateblock_mask_set_bits(&mask->OMRenderTargets, 1, start_idx, count);
|
2021-10-06 09:53:34 +02:00
|
|
|
case D3D10_DST_OM_DEPTH_STENCIL_STATE:
|
2011-11-16 20:08:03 +01:00
|
|
|
return stateblock_mask_set_bits(&mask->OMDepthStencilState, 1, start_idx, count);
|
2021-10-06 09:53:34 +02:00
|
|
|
case D3D10_DST_OM_BLEND_STATE:
|
2011-11-16 20:08:03 +01:00
|
|
|
return stateblock_mask_set_bits(&mask->OMBlendState, 1, start_idx, count);
|
|
|
|
case D3D10_DST_VS:
|
|
|
|
return stateblock_mask_set_bits(&mask->VS, 1, start_idx, count);
|
|
|
|
case D3D10_DST_VS_SAMPLERS:
|
|
|
|
return stateblock_mask_set_bits(mask->VSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_VS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_set_bits(mask->VSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_VS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_set_bits(mask->VSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_GS:
|
|
|
|
return stateblock_mask_set_bits(&mask->GS, 1, start_idx, count);
|
|
|
|
case D3D10_DST_GS_SAMPLERS:
|
|
|
|
return stateblock_mask_set_bits(mask->GSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_GS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_set_bits(mask->GSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_GS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_set_bits(mask->GSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_PS:
|
|
|
|
return stateblock_mask_set_bits(&mask->PS, 1, start_idx, count);
|
|
|
|
case D3D10_DST_PS_SAMPLERS:
|
|
|
|
return stateblock_mask_set_bits(mask->PSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_PS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_set_bits(mask->PSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_PS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_set_bits(mask->PSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_IA_VERTEX_BUFFERS:
|
|
|
|
return stateblock_mask_set_bits(mask->IAVertexBuffers,
|
|
|
|
D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
|
|
|
|
case D3D10_DST_IA_INDEX_BUFFER:
|
|
|
|
return stateblock_mask_set_bits(&mask->IAIndexBuffer, 1, start_idx, count);
|
|
|
|
case D3D10_DST_IA_INPUT_LAYOUT:
|
|
|
|
return stateblock_mask_set_bits(&mask->IAInputLayout, 1, start_idx, count);
|
|
|
|
case D3D10_DST_IA_PRIMITIVE_TOPOLOGY:
|
|
|
|
return stateblock_mask_set_bits(&mask->IAPrimitiveTopology, 1, start_idx, count);
|
|
|
|
case D3D10_DST_RS_VIEWPORTS:
|
|
|
|
return stateblock_mask_set_bits(&mask->RSViewports, 1, start_idx, count);
|
|
|
|
case D3D10_DST_RS_SCISSOR_RECTS:
|
|
|
|
return stateblock_mask_set_bits(&mask->RSScissorRects, 1, start_idx, count);
|
|
|
|
case D3D10_DST_RS_RASTERIZER_STATE:
|
|
|
|
return stateblock_mask_set_bits(&mask->RSRasterizerState, 1, start_idx, count);
|
|
|
|
case D3D10_DST_PREDICATION:
|
|
|
|
return stateblock_mask_set_bits(&mask->Predication, 1, start_idx, count);
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled state_type %#x.\n", state_type);
|
|
|
|
return E_INVALIDARG;
|
|
|
|
}
|
|
|
|
}
|
2011-11-16 20:08:04 +01:00
|
|
|
|
|
|
|
BOOL WINAPI D3D10StateBlockMaskGetSetting(D3D10_STATE_BLOCK_MASK *mask,
|
|
|
|
D3D10_DEVICE_STATE_TYPES state_type, UINT idx)
|
|
|
|
{
|
|
|
|
TRACE("mask %p state_type %s, idx %u.\n",
|
|
|
|
mask, debug_d3d10_device_state_types(state_type), idx);
|
|
|
|
|
|
|
|
if (!mask)
|
|
|
|
return FALSE;
|
|
|
|
|
|
|
|
switch (state_type)
|
|
|
|
{
|
|
|
|
case D3D10_DST_SO_BUFFERS:
|
|
|
|
return stateblock_mask_get_bit(&mask->SOBuffers, 1, idx);
|
|
|
|
case D3D10_DST_OM_RENDER_TARGETS:
|
|
|
|
return stateblock_mask_get_bit(&mask->OMRenderTargets, 1, idx);
|
2021-10-06 09:53:34 +02:00
|
|
|
case D3D10_DST_OM_DEPTH_STENCIL_STATE:
|
2011-11-16 20:08:04 +01:00
|
|
|
return stateblock_mask_get_bit(&mask->OMDepthStencilState, 1, idx);
|
2021-10-06 09:53:34 +02:00
|
|
|
case D3D10_DST_OM_BLEND_STATE:
|
2011-11-16 20:08:04 +01:00
|
|
|
return stateblock_mask_get_bit(&mask->OMBlendState, 1, idx);
|
|
|
|
case D3D10_DST_VS:
|
|
|
|
return stateblock_mask_get_bit(&mask->VS, 1, idx);
|
|
|
|
case D3D10_DST_VS_SAMPLERS:
|
|
|
|
return stateblock_mask_get_bit(mask->VSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_VS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_get_bit(mask->VSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_VS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_get_bit(mask->VSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_GS:
|
|
|
|
return stateblock_mask_get_bit(&mask->GS, 1, idx);
|
|
|
|
case D3D10_DST_GS_SAMPLERS:
|
|
|
|
return stateblock_mask_get_bit(mask->GSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_GS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_get_bit(mask->GSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_GS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_get_bit(mask->GSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_PS:
|
|
|
|
return stateblock_mask_get_bit(&mask->PS, 1, idx);
|
|
|
|
case D3D10_DST_PS_SAMPLERS:
|
|
|
|
return stateblock_mask_get_bit(mask->PSSamplers,
|
|
|
|
D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_PS_SHADER_RESOURCES:
|
|
|
|
return stateblock_mask_get_bit(mask->PSShaderResources,
|
|
|
|
D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_PS_CONSTANT_BUFFERS:
|
|
|
|
return stateblock_mask_get_bit(mask->PSConstantBuffers,
|
|
|
|
D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_IA_VERTEX_BUFFERS:
|
|
|
|
return stateblock_mask_get_bit(mask->IAVertexBuffers,
|
|
|
|
D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT, idx);
|
|
|
|
case D3D10_DST_IA_INDEX_BUFFER:
|
|
|
|
return stateblock_mask_get_bit(&mask->IAIndexBuffer, 1, idx);
|
|
|
|
case D3D10_DST_IA_INPUT_LAYOUT:
|
|
|
|
return stateblock_mask_get_bit(&mask->IAInputLayout, 1, idx);
|
|
|
|
case D3D10_DST_IA_PRIMITIVE_TOPOLOGY:
|
|
|
|
return stateblock_mask_get_bit(&mask->IAPrimitiveTopology, 1, idx);
|
|
|
|
case D3D10_DST_RS_VIEWPORTS:
|
|
|
|
return stateblock_mask_get_bit(&mask->RSViewports, 1, idx);
|
|
|
|
case D3D10_DST_RS_SCISSOR_RECTS:
|
|
|
|
return stateblock_mask_get_bit(&mask->RSScissorRects, 1, idx);
|
|
|
|
case D3D10_DST_RS_RASTERIZER_STATE:
|
|
|
|
return stateblock_mask_get_bit(&mask->RSRasterizerState, 1, idx);
|
|
|
|
case D3D10_DST_PREDICATION:
|
|
|
|
return stateblock_mask_get_bit(&mask->Predication, 1, idx);
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled state_type %#x.\n", state_type);
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
}
|
2011-11-16 20:08:05 +01:00
|
|
|
|
|
|
|
HRESULT WINAPI D3D10StateBlockMaskIntersect(D3D10_STATE_BLOCK_MASK *mask_x,
|
|
|
|
D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result)
|
|
|
|
{
|
|
|
|
UINT count = sizeof(*result) / sizeof(DWORD);
|
|
|
|
UINT i;
|
|
|
|
|
|
|
|
TRACE("mask_x %p, mask_y %p, result %p.\n", mask_x, mask_y, result);
|
|
|
|
|
|
|
|
if (!mask_x || !mask_y || !result)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
for (i = 0; i < count; ++i)
|
|
|
|
{
|
|
|
|
((DWORD *)result)[i] = ((DWORD *)mask_x)[i] & ((DWORD *)mask_y)[i];
|
|
|
|
}
|
|
|
|
for (i = count * sizeof(DWORD); i < sizeof(*result); ++i)
|
|
|
|
{
|
|
|
|
((BYTE *)result)[i] = ((BYTE *)mask_x)[i] & ((BYTE *)mask_y)[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|
2011-11-17 20:11:37 +01:00
|
|
|
|
|
|
|
HRESULT WINAPI D3D10StateBlockMaskUnion(D3D10_STATE_BLOCK_MASK *mask_x,
|
|
|
|
D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result)
|
|
|
|
{
|
|
|
|
UINT count = sizeof(*result) / sizeof(DWORD);
|
|
|
|
UINT i;
|
|
|
|
|
|
|
|
TRACE("mask_x %p, mask_y %p, result %p.\n", mask_x, mask_y, result);
|
|
|
|
|
|
|
|
if (!mask_x || !mask_y || !result)
|
|
|
|
return E_INVALIDARG;
|
|
|
|
|
|
|
|
for (i = 0; i < count; ++i)
|
|
|
|
{
|
|
|
|
((DWORD *)result)[i] = ((DWORD *)mask_x)[i] | ((DWORD *)mask_y)[i];
|
|
|
|
}
|
|
|
|
for (i = count * sizeof(DWORD); i < sizeof(*result); ++i)
|
|
|
|
{
|
|
|
|
((BYTE *)result)[i] = ((BYTE *)mask_x)[i] | ((BYTE *)mask_y)[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
return S_OK;
|
|
|
|
}
|