d3dx9: Add ps_3_0 instructions parsing to the shader assembler.
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@ -161,6 +161,16 @@ texldl {return INSTR_TEXLDL; }
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lit {return INSTR_LIT; }
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mova {return INSTR_MOVA; }
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/* Pixel shader only instructions */
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cmp {return INSTR_CMP; }
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dp2add {return INSTR_DP2ADD; }
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texkill {return INSTR_TEXKILL; }
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texld {return INSTR_TEXLD; }
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dsx {return INSTR_DSX; }
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dsy {return INSTR_DSY; }
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texldp {return INSTR_TEXLDP; }
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texldb {return INSTR_TEXLDB; }
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texldd {return INSTR_TEXLDD; }
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{REG_TEMP} {
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asmshader_lval.regnum = atoi(yytext + 1);
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@ -147,6 +147,17 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
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%token INSTR_LIT
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%token INSTR_MOVA
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/* Pixel shader only instructions */
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%token INSTR_CMP
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%token INSTR_DP2ADD
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%token INSTR_TEXKILL
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%token INSTR_TEXLD
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%token INSTR_DSX
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%token INSTR_DSY
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%token INSTR_TEXLDP
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%token INSTR_TEXLDB
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%token INSTR_TEXLDD
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/* Registers */
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%token <regnum> REG_TEMP
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%token <regnum> REG_OUTPUT
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@ -685,6 +696,52 @@ instruction: INSTR_ADD omods dreg ',' sregs
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TRACE("MOVA\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_MOVA, $2.mod, $2.shift, 0, &$3, &$5, 1);
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}
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| INSTR_CMP omods dreg ',' sregs
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{
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TRACE("CMP\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_CMP, $2.mod, $2.shift, 0, &$3, &$5, 3);
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}
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| INSTR_DP2ADD omods dreg ',' sregs
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{
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TRACE("DP2ADD\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_DP2ADD, $2.mod, $2.shift, 0, &$3, &$5, 3);
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}
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| INSTR_TEXLD omods dreg ',' sregs
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{
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TRACE("TEXLD\n");
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/* There is more than one acceptable syntax for texld:
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with 1 sreg (PS 1.4) or
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with 2 sregs (PS 2.0+)
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Moreover, texld shares the same opcode as the tex instruction,
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so there are a total of 3 valid syntaxes
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These variations are handled in asmparser.c */
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEX, $2.mod, $2.shift, 0, &$3, &$5, 2);
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}
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| INSTR_TEXLDP omods dreg ',' sregs
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{
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TRACE("TEXLDP\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEX | ( BWRITERSI_TEXLD_PROJECT << BWRITER_OPCODESPECIFICCONTROL_SHIFT ), $2.mod, $2.shift, 0, &$3, &$5, 2);
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}
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| INSTR_TEXLDB omods dreg ',' sregs
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{
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TRACE("TEXLDB\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEX | ( BWRITERSI_TEXLD_BIAS << BWRITER_OPCODESPECIFICCONTROL_SHIFT ), $2.mod, $2.shift, 0, &$3, &$5, 2);
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}
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| INSTR_DSX omods dreg ',' sregs
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{
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TRACE("DSX\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_DSX, $2.mod, $2.shift, 0, &$3, &$5, 1);
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}
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| INSTR_DSY omods dreg ',' sregs
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{
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TRACE("DSY\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_DSY, $2.mod, $2.shift, 0, &$3, &$5, 1);
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}
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| INSTR_TEXLDD omods dreg ',' sregs
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{
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TRACE("TEXLDD\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_TEXLDD, $2.mod, $2.shift, 0, &$3, &$5, 4);
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}
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dreg: dreg_name rel_reg
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{
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@ -191,9 +191,17 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
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case BWRITERSIO_MOVA: return D3DSIO_MOVA;
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case BWRITERSIO_DEFB: return D3DSIO_DEFB;
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case BWRITERSIO_DEFI: return D3DSIO_DEFI;
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case BWRITERSIO_TEXKILL: return D3DSIO_TEXKILL;
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case BWRITERSIO_TEX: return D3DSIO_TEX;
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case BWRITERSIO_EXPP: return D3DSIO_EXPP;
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case BWRITERSIO_LOGP: return D3DSIO_LOGP;
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case BWRITERSIO_DEF: return D3DSIO_DEF;
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case BWRITERSIO_CMP: return D3DSIO_CMP;
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case BWRITERSIO_DP2ADD: return D3DSIO_DP2ADD;
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case BWRITERSIO_DSX: return D3DSIO_DSX;
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case BWRITERSIO_DSY: return D3DSIO_DSY;
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case BWRITERSIO_TEXLDD: return D3DSIO_TEXLDD;
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case BWRITERSIO_SETP: return D3DSIO_SETP;
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case BWRITERSIO_TEXLDL: return D3DSIO_TEXLDL;
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case BWRITERSIO_BREAKP: return D3DSIO_BREAKP;
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@ -201,6 +209,9 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
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case BWRITERSIO_COMMENT: return D3DSIO_COMMENT;
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case BWRITERSIO_END: return D3DSIO_END;
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case BWRITERSIO_TEX | ( BWRITERSI_TEXLD_PROJECT << BWRITER_OPCODESPECIFICCONTROL_SHIFT ): return D3DSIO_TEX | D3DSI_TEXLD_PROJECT;
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case BWRITERSIO_TEX | ( BWRITERSI_TEXLD_BIAS << BWRITER_OPCODESPECIFICCONTROL_SHIFT ): return D3DSIO_TEX | D3DSI_TEXLD_BIAS;
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default:
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FIXME("Unhandled BWRITERSIO token %u\n", bwriter_opcode);
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return -1;
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@ -459,13 +470,23 @@ const char *debug_print_opcode(DWORD opcode) {
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case BWRITERSIO_MOVA: return "mova";
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case BWRITERSIO_DEFB: return "defb";
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case BWRITERSIO_DEFI: return "defi";
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case BWRITERSIO_TEXKILL: return "texkill";
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case BWRITERSIO_TEX: return "tex";
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case BWRITERSIO_EXPP: return "expp";
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case BWRITERSIO_LOGP: return "logp";
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case BWRITERSIO_DEF: return "def";
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case BWRITERSIO_CMP: return "cmp";
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case BWRITERSIO_DP2ADD: return "dp2add";
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case BWRITERSIO_DSX: return "dsx";
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case BWRITERSIO_DSY: return "dsy";
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case BWRITERSIO_TEXLDD: return "texldd";
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case BWRITERSIO_SETP: return "setp";
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case BWRITERSIO_TEXLDL: return "texldl";
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case BWRITERSIO_BREAKP: return "breakp";
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case BWRITERSIO_TEX | ( BWRITERSI_TEXLD_PROJECT << BWRITER_OPCODESPECIFICCONTROL_SHIFT ): return "texldp";
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case BWRITERSIO_TEX | ( BWRITERSI_TEXLD_BIAS << BWRITER_OPCODESPECIFICCONTROL_SHIFT ): return "texldb";
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default: return "unknown";
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}
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}
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@ -448,9 +448,16 @@ typedef enum _BWRITERSHADER_INSTRUCTION_OPCODE_TYPE {
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BWRITERSIO_DEFB,
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BWRITERSIO_DEFI,
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BWRITERSIO_TEXKILL,
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BWRITERSIO_TEX,
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BWRITERSIO_EXPP,
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BWRITERSIO_LOGP,
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BWRITERSIO_DEF,
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BWRITERSIO_CMP,
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BWRITERSIO_DP2ADD,
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BWRITERSIO_DSX,
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BWRITERSIO_DSY,
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BWRITERSIO_TEXLDD,
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BWRITERSIO_SETP,
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BWRITERSIO_TEXLDL,
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BWRITERSIO_BREAKP,
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@ -508,6 +515,9 @@ typedef enum _BWRITERSAMPLER_TEXTURE_TYPE {
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BWRITERSTT_VOLUME = 4,
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} BWRITERSAMPLER_TEXTURE_TYPE;
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#define BWRITERSI_TEXLD_PROJECT 1
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#define BWRITERSI_TEXLD_BIAS 2
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typedef enum _BWRITERSHADER_PARAM_SRCMOD_TYPE {
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BWRITERSPSM_NONE = 0,
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BWRITERSPSM_NEG,
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@ -578,6 +588,9 @@ typedef enum _BWRITERDECLUSAGE {
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BWRITERDECLUSAGE_SAMPLE
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} BWRITERDECLUSAGE;
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#define BWRITER_OPCODESPECIFICCONTROL_SHIFT 16
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#define BWRITER_OPCODESPECIFICCONTROL_MASK (0xff << BWRITER_OPCODESPECIFICCONTROL_SHIFT)
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struct bwriter_shader *SlAssembleShader(const char *text, char **messages);
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DWORD SlWriteBytecode(const struct bwriter_shader *shader, int dxversion, DWORD **result);
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void SlDeleteShader(struct bwriter_shader *shader);
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