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how-lix-os-pkgs/gdb/9.2/patch

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The s390 versions of fill_gregset / supply_gregset and fill_fpregset /
supply_fpregset declare the data structure to be filled or supplied from
as gregset_t and fpregset_t, respectively, instead of gdb_gregset_t and
gdb_fpregset_t. This is incompatible with the declaration of these
functions in gregset.h.
gdb/ChangeLog:
* s390-linux-nat.c (supply_gregset, fill_gregset, fetch_regs)
(store_regs): Replace gregset_t by gdb_gregset_t.
(supply_fpregset, fill_fpregset, fetch_fpregs, store_fpregs):
Replace fpregset_t by gdb_fpregset_t.
Credit to Andreas Arnez at IBM
---
diff --git a/gdb/s390-linux-nat.c b/gdb/s390-linux-nat.c
index 2c60562..c48a35a 100644
--- a/gdb/s390-linux-nat.c
+++ b/gdb/s390-linux-nat.c
@@ -153,7 +153,7 @@ static s390_linux_nat_target the_s390_linux_nat_target;
make them look like 32-bit registers. */
void
-supply_gregset (struct regcache *regcache, const gregset_t *regp)
+supply_gregset (struct regcache *regcache, const gdb_gregset_t *regp)
{
#ifdef __s390x__
struct gdbarch *gdbarch = regcache->arch ();
@@ -164,7 +164,7 @@ supply_gregset (struct regcache *regcache, const gregset_t *regp)
gdb_byte buf[4];
regcache_supply_regset (&s390_64_gregset, regcache, -1,
- regp, sizeof (gregset_t));
+ regp, sizeof (gdb_gregset_t));
pswm = extract_unsigned_integer ((const gdb_byte *) regp
+ S390_PSWM_OFFSET, 8, byte_order);
pswa = extract_unsigned_integer ((const gdb_byte *) regp
@@ -179,7 +179,7 @@ supply_gregset (struct regcache *regcache, const gregset_t *regp)
#endif
regcache_supply_regset (&s390_gregset, regcache, -1, regp,
- sizeof (gregset_t));
+ sizeof (gdb_gregset_t));
}
/* Fill register REGNO (if it is a general-purpose register) in
@@ -187,14 +187,14 @@ supply_gregset (struct regcache *regcache, const gregset_t *regp)
do this for all registers. */
void
-fill_gregset (const struct regcache *regcache, gregset_t *regp, int regno)
+fill_gregset (const struct regcache *regcache, gdb_gregset_t *regp, int regno)
{
#ifdef __s390x__
struct gdbarch *gdbarch = regcache->arch ();
if (gdbarch_ptr_bit (gdbarch) == 32)
{
regcache_collect_regset (&s390_64_gregset, regcache, regno,
- regp, sizeof (gregset_t));
+ regp, sizeof (gdb_gregset_t));
if (regno == -1
|| regno == S390_PSWM_REGNUM || regno == S390_PSWA_REGNUM)
@@ -231,26 +231,27 @@ fill_gregset (const struct regcache *regcache, gregset_t *regp, int regno)
#endif
regcache_collect_regset (&s390_gregset, regcache, regno, regp,
- sizeof (gregset_t));
+ sizeof (gdb_gregset_t));
}
/* Fill GDB's register array with the floating-point register values
in *REGP. */
void
-supply_fpregset (struct regcache *regcache, const fpregset_t *regp)
+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *regp)
{
regcache_supply_regset (&s390_fpregset, regcache, -1, regp,
- sizeof (fpregset_t));
+ sizeof (gdb_fpregset_t));
}
/* Fill register REGNO (if it is a general-purpose register) in
*REGP with the value in GDB's register array. If REGNO is -1,
do this for all registers. */
void
-fill_fpregset (const struct regcache *regcache, fpregset_t *regp, int regno)
+fill_fpregset (const struct regcache *regcache, gdb_fpregset_t *regp,
+ int regno)
{
regcache_collect_regset (&s390_fpregset, regcache, regno, regp,
- sizeof (fpregset_t));
+ sizeof (gdb_fpregset_t));
}
/* Find the TID for the current inferior thread to use with ptrace. */
@@ -270,7 +271,7 @@ s390_inferior_tid (void)
static void
fetch_regs (struct regcache *regcache, int tid)
{
- gregset_t regs;
+ gdb_gregset_t regs;
ptrace_area parea;
parea.len = sizeof (regs);
@@ -279,7 +280,7 @@ fetch_regs (struct regcache *regcache, int tid)
if (ptrace (PTRACE_PEEKUSR_AREA, tid, (long) &parea, 0) < 0)
perror_with_name (_("Couldn't get registers"));
- supply_gregset (regcache, (const gregset_t *) &regs);
+ supply_gregset (regcache, (const gdb_gregset_t *) &regs);
}
/* Store all valid general-purpose registers in GDB's register cache
@@ -287,7 +288,7 @@ fetch_regs (struct regcache *regcache, int tid)
static void
store_regs (const struct regcache *regcache, int tid, int regnum)
{
- gregset_t regs;
+ gdb_gregset_t regs;
ptrace_area parea;
parea.len = sizeof (regs);
@@ -307,7 +308,7 @@ store_regs (const struct regcache *regcache, int tid, int regnum)
static void
fetch_fpregs (struct regcache *regcache, int tid)
{
- fpregset_t fpregs;
+ gdb_fpregset_t fpregs;
ptrace_area parea;
parea.len = sizeof (fpregs);
@@ -316,7 +317,7 @@ fetch_fpregs (struct regcache *regcache, int tid)
if (ptrace (PTRACE_PEEKUSR_AREA, tid, (long) &parea, 0) < 0)
perror_with_name (_("Couldn't get floating point status"));
- supply_fpregset (regcache, (const fpregset_t *) &fpregs);
+ supply_fpregset (regcache, (const gdb_fpregset_t *) &fpregs);
}
/* Store all valid floating-point registers in GDB's register cache
@@ -324,7 +325,7 @@ fetch_fpregs (struct regcache *regcache, int tid)
static void
store_fpregs (const struct regcache *regcache, int tid, int regnum)
{
- fpregset_t fpregs;
+ gdb_fpregset_t fpregs;
ptrace_area parea;
parea.len = sizeof (fpregs);
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -21,7 +21,6 @@
#include "linux-low.h"
#include <elf.h>
-#include <asm/ptrace.h>
#include "nat/ppc-linux.h"
#include "linux-ppc-tdesc.h"
--- a/gdb/nat/ppc-linux.h
+++ b/gdb/nat/ppc-linux.h
@@ -18,7 +18,90 @@
#ifndef PPC_LINUX_H
#define PPC_LINUX_H 1
+#if defined(__GLIBC__) || defined(__UCLIBC__)
#include <asm/ptrace.h>
+#else // Musl
+// Do not include ptrace.h from Linux headers and since
+// Musl does not define PT_*, define them:
+
+#define PT_R0 0
+#define PT_R1 1
+#define PT_R2 2
+#define PT_R3 3
+#define PT_R4 4
+#define PT_R5 5
+#define PT_R6 6
+#define PT_R7 7
+#define PT_R8 8
+#define PT_R9 9
+#define PT_R10 10
+#define PT_R11 11
+#define PT_R12 12
+#define PT_R13 13
+#define PT_R14 14
+#define PT_R15 15
+#define PT_R16 16
+#define PT_R17 17
+#define PT_R18 18
+#define PT_R19 19
+#define PT_R20 20
+#define PT_R21 21
+#define PT_R22 22
+#define PT_R23 23
+#define PT_R24 24
+#define PT_R25 25
+#define PT_R26 26
+#define PT_R27 27
+#define PT_R28 28
+#define PT_R29 29
+#define PT_R30 30
+#define PT_R31 31
+
+#define PT_NIP 32
+#define PT_MSR 33
+#define PT_ORIG_R3 34
+#define PT_CTR 35
+#define PT_LNK 36
+#define PT_XER 37
+#define PT_CCR 38
+#ifndef __powerpc64__
+#define PT_MQ 39
+#else
+#define PT_SOFTE 39
+#endif
+#define PT_TRAP 40
+#define PT_DAR 41
+#define PT_DSISR 42
+#define PT_RESULT 43
+#define PT_DSCR 44
+#define PT_REGS_COUNT 44
+
+#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
+
+#ifndef __powerpc64__
+
+#define PT_FPR31 (PT_FPR0 + 2*31)
+#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
+
+#else /* __powerpc64__ */
+
+#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
+
+
+#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
+#define PT_VSCR (PT_VR0 + 32*2 + 1)
+#define PT_VRSAVE (PT_VR0 + 33*2)
+
+
+/*
+ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
+ */
+#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
+#define PT_VSR31 (PT_VSR0 + 2*31)
+#endif /* __powerpc64__ */
+
+#endif // Libc
+
#include <asm/cputable.h>
/* This sometimes isn't defined. */
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