mirror of https://github.com/odrling/Aegisub
552 lines
17 KiB
C
552 lines
17 KiB
C
/*
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** SSA IR (Intermediate Representation) format.
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** Copyright (C) 2005-2017 Mike Pall. See Copyright Notice in luajit.h
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*/
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#ifndef _LJ_IR_H
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#define _LJ_IR_H
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#include "lj_obj.h"
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/* -- IR instructions ----------------------------------------------------- */
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/* IR instruction definition. Order matters, see below. ORDER IR */
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#define IRDEF(_) \
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/* Guarded assertions. */ \
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/* Must be properly aligned to flip opposites (^1) and (un)ordered (^4). */ \
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_(LT, N , ref, ref) \
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_(GE, N , ref, ref) \
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_(LE, N , ref, ref) \
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_(GT, N , ref, ref) \
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\
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_(ULT, N , ref, ref) \
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_(UGE, N , ref, ref) \
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_(ULE, N , ref, ref) \
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_(UGT, N , ref, ref) \
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\
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_(EQ, C , ref, ref) \
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_(NE, C , ref, ref) \
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\
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_(ABC, N , ref, ref) \
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_(RETF, S , ref, ref) \
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\
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/* Miscellaneous ops. */ \
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_(NOP, N , ___, ___) \
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_(BASE, N , lit, lit) \
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_(PVAL, N , lit, ___) \
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_(GCSTEP, S , ___, ___) \
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_(HIOP, S , ref, ref) \
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_(LOOP, S , ___, ___) \
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_(USE, S , ref, ___) \
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_(PHI, S , ref, ref) \
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_(RENAME, S , ref, lit) \
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\
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/* Constants. */ \
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_(KPRI, N , ___, ___) \
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_(KINT, N , cst, ___) \
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_(KGC, N , cst, ___) \
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_(KPTR, N , cst, ___) \
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_(KKPTR, N , cst, ___) \
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_(KNULL, N , cst, ___) \
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_(KNUM, N , cst, ___) \
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_(KINT64, N , cst, ___) \
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_(KSLOT, N , ref, lit) \
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\
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/* Bit ops. */ \
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_(BNOT, N , ref, ___) \
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_(BSWAP, N , ref, ___) \
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_(BAND, C , ref, ref) \
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_(BOR, C , ref, ref) \
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_(BXOR, C , ref, ref) \
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_(BSHL, N , ref, ref) \
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_(BSHR, N , ref, ref) \
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_(BSAR, N , ref, ref) \
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_(BROL, N , ref, ref) \
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_(BROR, N , ref, ref) \
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\
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/* Arithmetic ops. ORDER ARITH */ \
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_(ADD, C , ref, ref) \
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_(SUB, N , ref, ref) \
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_(MUL, C , ref, ref) \
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_(DIV, N , ref, ref) \
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_(MOD, N , ref, ref) \
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_(POW, N , ref, ref) \
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_(NEG, N , ref, ref) \
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\
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_(ABS, N , ref, ref) \
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_(ATAN2, N , ref, ref) \
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_(LDEXP, N , ref, ref) \
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_(MIN, C , ref, ref) \
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_(MAX, C , ref, ref) \
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_(FPMATH, N , ref, lit) \
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\
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/* Overflow-checking arithmetic ops. */ \
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_(ADDOV, CW, ref, ref) \
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_(SUBOV, NW, ref, ref) \
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_(MULOV, CW, ref, ref) \
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\
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/* Memory ops. A = array, H = hash, U = upvalue, F = field, S = stack. */ \
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\
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/* Memory references. */ \
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_(AREF, R , ref, ref) \
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_(HREFK, R , ref, ref) \
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_(HREF, L , ref, ref) \
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_(NEWREF, S , ref, ref) \
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_(UREFO, LW, ref, lit) \
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_(UREFC, LW, ref, lit) \
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_(FREF, R , ref, lit) \
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_(STRREF, N , ref, ref) \
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\
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/* Loads and Stores. These must be in the same order. */ \
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_(ALOAD, L , ref, ___) \
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_(HLOAD, L , ref, ___) \
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_(ULOAD, L , ref, ___) \
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_(FLOAD, L , ref, lit) \
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_(XLOAD, L , ref, lit) \
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_(SLOAD, L , lit, lit) \
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_(VLOAD, L , ref, ___) \
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\
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_(ASTORE, S , ref, ref) \
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_(HSTORE, S , ref, ref) \
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_(USTORE, S , ref, ref) \
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_(FSTORE, S , ref, ref) \
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_(XSTORE, S , ref, ref) \
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\
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/* Allocations. */ \
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_(SNEW, N , ref, ref) /* CSE is ok, not marked as A. */ \
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_(XSNEW, A , ref, ref) \
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_(TNEW, AW, lit, lit) \
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_(TDUP, AW, ref, ___) \
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_(CNEW, AW, ref, ref) \
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_(CNEWI, NW, ref, ref) /* CSE is ok, not marked as A. */ \
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\
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/* Barriers. */ \
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_(TBAR, S , ref, ___) \
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_(OBAR, S , ref, ref) \
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_(XBAR, S , ___, ___) \
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\
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/* Type conversions. */ \
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_(CONV, NW, ref, lit) \
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_(TOBIT, N , ref, ref) \
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_(TOSTR, N , ref, ___) \
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_(STRTO, N , ref, ___) \
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\
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/* Calls. */ \
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_(CALLN, N , ref, lit) \
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_(CALLL, L , ref, lit) \
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_(CALLS, S , ref, lit) \
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_(CALLXS, S , ref, ref) \
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_(CARG, N , ref, ref) \
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\
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/* End of list. */
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/* IR opcodes (max. 256). */
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typedef enum {
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#define IRENUM(name, m, m1, m2) IR_##name,
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IRDEF(IRENUM)
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#undef IRENUM
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IR__MAX
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} IROp;
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/* Stored opcode. */
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typedef uint8_t IROp1;
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LJ_STATIC_ASSERT(((int)IR_EQ^1) == (int)IR_NE);
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LJ_STATIC_ASSERT(((int)IR_LT^1) == (int)IR_GE);
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LJ_STATIC_ASSERT(((int)IR_LE^1) == (int)IR_GT);
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LJ_STATIC_ASSERT(((int)IR_LT^3) == (int)IR_GT);
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LJ_STATIC_ASSERT(((int)IR_LT^4) == (int)IR_ULT);
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/* Delta between xLOAD and xSTORE. */
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#define IRDELTA_L2S ((int)IR_ASTORE - (int)IR_ALOAD)
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LJ_STATIC_ASSERT((int)IR_HLOAD + IRDELTA_L2S == (int)IR_HSTORE);
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LJ_STATIC_ASSERT((int)IR_ULOAD + IRDELTA_L2S == (int)IR_USTORE);
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LJ_STATIC_ASSERT((int)IR_FLOAD + IRDELTA_L2S == (int)IR_FSTORE);
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LJ_STATIC_ASSERT((int)IR_XLOAD + IRDELTA_L2S == (int)IR_XSTORE);
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/* -- Named IR literals --------------------------------------------------- */
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/* FPMATH sub-functions. ORDER FPM. */
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#define IRFPMDEF(_) \
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_(FLOOR) _(CEIL) _(TRUNC) /* Must be first and in this order. */ \
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_(SQRT) _(EXP) _(EXP2) _(LOG) _(LOG2) _(LOG10) \
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_(SIN) _(COS) _(TAN) \
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_(OTHER)
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typedef enum {
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#define FPMENUM(name) IRFPM_##name,
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IRFPMDEF(FPMENUM)
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#undef FPMENUM
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IRFPM__MAX
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} IRFPMathOp;
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/* FLOAD fields. */
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#define IRFLDEF(_) \
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_(STR_LEN, offsetof(GCstr, len)) \
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_(FUNC_ENV, offsetof(GCfunc, l.env)) \
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_(FUNC_PC, offsetof(GCfunc, l.pc)) \
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_(TAB_META, offsetof(GCtab, metatable)) \
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_(TAB_ARRAY, offsetof(GCtab, array)) \
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_(TAB_NODE, offsetof(GCtab, node)) \
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_(TAB_ASIZE, offsetof(GCtab, asize)) \
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_(TAB_HMASK, offsetof(GCtab, hmask)) \
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_(TAB_NOMM, offsetof(GCtab, nomm)) \
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_(UDATA_META, offsetof(GCudata, metatable)) \
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_(UDATA_UDTYPE, offsetof(GCudata, udtype)) \
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_(UDATA_FILE, sizeof(GCudata)) \
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_(CDATA_CTYPEID, offsetof(GCcdata, ctypeid)) \
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_(CDATA_PTR, sizeof(GCcdata)) \
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_(CDATA_INT, sizeof(GCcdata)) \
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_(CDATA_INT64, sizeof(GCcdata)) \
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_(CDATA_INT64_4, sizeof(GCcdata) + 4)
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typedef enum {
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#define FLENUM(name, ofs) IRFL_##name,
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IRFLDEF(FLENUM)
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#undef FLENUM
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IRFL__MAX
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} IRFieldID;
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/* SLOAD mode bits, stored in op2. */
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#define IRSLOAD_PARENT 0x01 /* Coalesce with parent trace. */
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#define IRSLOAD_FRAME 0x02 /* Load hiword of frame. */
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#define IRSLOAD_TYPECHECK 0x04 /* Needs type check. */
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#define IRSLOAD_CONVERT 0x08 /* Number to integer conversion. */
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#define IRSLOAD_READONLY 0x10 /* Read-only, omit slot store. */
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#define IRSLOAD_INHERIT 0x20 /* Inherited by exits/side traces. */
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/* XLOAD mode, stored in op2. */
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#define IRXLOAD_READONLY 1 /* Load from read-only data. */
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#define IRXLOAD_VOLATILE 2 /* Load from volatile data. */
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#define IRXLOAD_UNALIGNED 4 /* Unaligned load. */
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/* CONV mode, stored in op2. */
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#define IRCONV_SRCMASK 0x001f /* Source IRType. */
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#define IRCONV_DSTMASK 0x03e0 /* Dest. IRType (also in ir->t). */
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#define IRCONV_DSH 5
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#define IRCONV_NUM_INT ((IRT_NUM<<IRCONV_DSH)|IRT_INT)
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#define IRCONV_INT_NUM ((IRT_INT<<IRCONV_DSH)|IRT_NUM)
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#define IRCONV_TRUNC 0x0400 /* Truncate number to integer. */
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#define IRCONV_SEXT 0x0800 /* Sign-extend integer to integer. */
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#define IRCONV_MODEMASK 0x0fff
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#define IRCONV_CONVMASK 0xf000
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#define IRCONV_CSH 12
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/* Number to integer conversion mode. Ordered by strength of the checks. */
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#define IRCONV_TOBIT (0<<IRCONV_CSH) /* None. Cache only: TOBIT conv. */
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#define IRCONV_ANY (1<<IRCONV_CSH) /* Any FP number is ok. */
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#define IRCONV_INDEX (2<<IRCONV_CSH) /* Check + special backprop rules. */
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#define IRCONV_CHECK (3<<IRCONV_CSH) /* Number checked for integerness. */
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/* -- IR operands --------------------------------------------------------- */
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/* IR operand mode (2 bit). */
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typedef enum {
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IRMref, /* IR reference. */
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IRMlit, /* 16 bit unsigned literal. */
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IRMcst, /* Constant literal: i, gcr or ptr. */
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IRMnone /* Unused operand. */
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} IRMode;
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#define IRM___ IRMnone
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/* Mode bits: Commutative, {Normal/Ref, Alloc, Load, Store}, Non-weak guard. */
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#define IRM_C 0x10
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#define IRM_N 0x00
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#define IRM_R IRM_N
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#define IRM_A 0x20
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#define IRM_L 0x40
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#define IRM_S 0x60
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#define IRM_W 0x80
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#define IRM_NW (IRM_N|IRM_W)
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#define IRM_CW (IRM_C|IRM_W)
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#define IRM_AW (IRM_A|IRM_W)
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#define IRM_LW (IRM_L|IRM_W)
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#define irm_op1(m) ((IRMode)((m)&3))
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#define irm_op2(m) ((IRMode)(((m)>>2)&3))
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#define irm_iscomm(m) ((m) & IRM_C)
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#define irm_kind(m) ((m) & IRM_S)
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#define IRMODE(name, m, m1, m2) (((IRM##m1)|((IRM##m2)<<2)|(IRM_##m))^IRM_W),
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LJ_DATA const uint8_t lj_ir_mode[IR__MAX+1];
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/* -- IR instruction types ------------------------------------------------ */
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/* Map of itypes to non-negative numbers. ORDER LJ_T.
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** LJ_TUPVAL/LJ_TTRACE never appear in a TValue. Use these itypes for
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** IRT_P32 and IRT_P64, which never escape the IR.
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** The various integers are only used in the IR and can only escape to
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** a TValue after implicit or explicit conversion. Their types must be
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** contiguous and next to IRT_NUM (see the typerange macros below).
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*/
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#define IRTDEF(_) \
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_(NIL, 4) _(FALSE, 4) _(TRUE, 4) _(LIGHTUD, LJ_64 ? 8 : 4) _(STR, 4) \
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_(P32, 4) _(THREAD, 4) _(PROTO, 4) _(FUNC, 4) _(P64, 8) _(CDATA, 4) \
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_(TAB, 4) _(UDATA, 4) \
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_(FLOAT, 4) _(NUM, 8) _(I8, 1) _(U8, 1) _(I16, 2) _(U16, 2) \
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_(INT, 4) _(U32, 4) _(I64, 8) _(U64, 8) \
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_(SOFTFP, 4) /* There is room for 9 more types. */
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/* IR result type and flags (8 bit). */
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typedef enum {
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#define IRTENUM(name, size) IRT_##name,
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IRTDEF(IRTENUM)
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#undef IRTENUM
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IRT__MAX,
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/* Native pointer type and the corresponding integer type. */
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IRT_PTR = LJ_64 ? IRT_P64 : IRT_P32,
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IRT_INTP = LJ_64 ? IRT_I64 : IRT_INT,
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IRT_UINTP = LJ_64 ? IRT_U64 : IRT_U32,
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/* Additional flags. */
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IRT_MARK = 0x20, /* Marker for misc. purposes. */
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IRT_ISPHI = 0x40, /* Instruction is left or right PHI operand. */
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IRT_GUARD = 0x80, /* Instruction is a guard. */
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/* Masks. */
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IRT_TYPE = 0x1f,
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IRT_T = 0xff
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} IRType;
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#define irtype_ispri(irt) ((uint32_t)(irt) <= IRT_TRUE)
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/* Stored IRType. */
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typedef struct IRType1 { uint8_t irt; } IRType1;
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#define IRT(o, t) ((uint32_t)(((o)<<8) | (t)))
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#define IRTI(o) (IRT((o), IRT_INT))
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#define IRTN(o) (IRT((o), IRT_NUM))
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#define IRTG(o, t) (IRT((o), IRT_GUARD|(t)))
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#define IRTGI(o) (IRT((o), IRT_GUARD|IRT_INT))
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#define irt_t(t) ((IRType)(t).irt)
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#define irt_type(t) ((IRType)((t).irt & IRT_TYPE))
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#define irt_sametype(t1, t2) ((((t1).irt ^ (t2).irt) & IRT_TYPE) == 0)
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#define irt_typerange(t, first, last) \
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((uint32_t)((t).irt & IRT_TYPE) - (uint32_t)(first) <= (uint32_t)(last-first))
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#define irt_isnil(t) (irt_type(t) == IRT_NIL)
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#define irt_ispri(t) ((uint32_t)irt_type(t) <= IRT_TRUE)
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#define irt_islightud(t) (irt_type(t) == IRT_LIGHTUD)
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#define irt_isstr(t) (irt_type(t) == IRT_STR)
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#define irt_istab(t) (irt_type(t) == IRT_TAB)
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#define irt_iscdata(t) (irt_type(t) == IRT_CDATA)
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#define irt_isfloat(t) (irt_type(t) == IRT_FLOAT)
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#define irt_isnum(t) (irt_type(t) == IRT_NUM)
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#define irt_isint(t) (irt_type(t) == IRT_INT)
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#define irt_isi8(t) (irt_type(t) == IRT_I8)
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#define irt_isu8(t) (irt_type(t) == IRT_U8)
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#define irt_isi16(t) (irt_type(t) == IRT_I16)
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#define irt_isu16(t) (irt_type(t) == IRT_U16)
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#define irt_isu32(t) (irt_type(t) == IRT_U32)
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#define irt_isi64(t) (irt_type(t) == IRT_I64)
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#define irt_isu64(t) (irt_type(t) == IRT_U64)
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#define irt_isfp(t) (irt_isnum(t) || irt_isfloat(t))
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#define irt_isinteger(t) (irt_typerange((t), IRT_I8, IRT_INT))
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#define irt_isgcv(t) (irt_typerange((t), IRT_STR, IRT_UDATA))
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#define irt_isaddr(t) (irt_typerange((t), IRT_LIGHTUD, IRT_UDATA))
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#define irt_isint64(t) (irt_typerange((t), IRT_I64, IRT_U64))
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#if LJ_64
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#define IRT_IS64 \
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((1u<<IRT_NUM)|(1u<<IRT_I64)|(1u<<IRT_U64)|(1u<<IRT_P64)|(1u<<IRT_LIGHTUD))
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#else
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#define IRT_IS64 \
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((1u<<IRT_NUM)|(1u<<IRT_I64)|(1u<<IRT_U64))
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#endif
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#define irt_is64(t) ((IRT_IS64 >> irt_type(t)) & 1)
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#define irt_is64orfp(t) (((IRT_IS64|(1u<<IRT_FLOAT))>>irt_type(t)) & 1)
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#define irt_size(t) (lj_ir_type_size[irt_t((t))])
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LJ_DATA const uint8_t lj_ir_type_size[];
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static LJ_AINLINE IRType itype2irt(const TValue *tv)
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{
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if (tvisint(tv))
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return IRT_INT;
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else if (tvisnum(tv))
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return IRT_NUM;
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#if LJ_64
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else if (tvislightud(tv))
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return IRT_LIGHTUD;
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#endif
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else
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return (IRType)~itype(tv);
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}
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static LJ_AINLINE uint32_t irt_toitype_(IRType t)
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{
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lua_assert(!LJ_64 || t != IRT_LIGHTUD);
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if (LJ_DUALNUM && t > IRT_NUM) {
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return LJ_TISNUM;
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} else {
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lua_assert(t <= IRT_NUM);
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return ~(uint32_t)t;
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}
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}
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#define irt_toitype(t) irt_toitype_(irt_type((t)))
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#define irt_isguard(t) ((t).irt & IRT_GUARD)
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#define irt_ismarked(t) ((t).irt & IRT_MARK)
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#define irt_setmark(t) ((t).irt |= IRT_MARK)
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#define irt_clearmark(t) ((t).irt &= ~IRT_MARK)
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#define irt_isphi(t) ((t).irt & IRT_ISPHI)
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#define irt_setphi(t) ((t).irt |= IRT_ISPHI)
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#define irt_clearphi(t) ((t).irt &= ~IRT_ISPHI)
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/* Stored combined IR opcode and type. */
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typedef uint16_t IROpT;
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/* -- IR references ------------------------------------------------------- */
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/* IR references. */
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typedef uint16_t IRRef1; /* One stored reference. */
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typedef uint32_t IRRef2; /* Two stored references. */
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typedef uint32_t IRRef; /* Used to pass around references. */
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/* Fixed references. */
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enum {
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REF_BIAS = 0x8000,
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REF_TRUE = REF_BIAS-3,
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REF_FALSE = REF_BIAS-2,
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REF_NIL = REF_BIAS-1, /* \--- Constants grow downwards. */
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REF_BASE = REF_BIAS, /* /--- IR grows upwards. */
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REF_FIRST = REF_BIAS+1,
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REF_DROP = 0xffff
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};
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/* Note: IRMlit operands must be < REF_BIAS, too!
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** This allows for fast and uniform manipulation of all operands
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** without looking up the operand mode in lj_ir_mode:
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** - CSE calculates the maximum reference of two operands.
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** This must work with mixed reference/literal operands, too.
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** - DCE marking only checks for operand >= REF_BIAS.
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** - LOOP needs to substitute reference operands.
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** Constant references and literals must not be modified.
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*/
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#define IRREF2(lo, hi) ((IRRef2)(lo) | ((IRRef2)(hi) << 16))
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#define irref_isk(ref) ((ref) < REF_BIAS)
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/* Tagged IR references (32 bit).
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**
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** +-------+-------+---------------+
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** | irt | flags | ref |
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** +-------+-------+---------------+
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**
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** The tag holds a copy of the IRType and speeds up IR type checks.
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*/
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typedef uint32_t TRef;
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#define TREF_REFMASK 0x0000ffff
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#define TREF_FRAME 0x00010000
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#define TREF_CONT 0x00020000
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#define TREF(ref, t) ((TRef)((ref) + ((t)<<24)))
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#define tref_ref(tr) ((IRRef1)(tr))
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#define tref_t(tr) ((IRType)((tr)>>24))
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#define tref_type(tr) ((IRType)(((tr)>>24) & IRT_TYPE))
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#define tref_typerange(tr, first, last) \
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((((tr)>>24) & IRT_TYPE) - (TRef)(first) <= (TRef)(last-first))
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#define tref_istype(tr, t) (((tr) & (IRT_TYPE<<24)) == ((t)<<24))
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#define tref_isnil(tr) (tref_istype((tr), IRT_NIL))
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#define tref_isfalse(tr) (tref_istype((tr), IRT_FALSE))
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#define tref_istrue(tr) (tref_istype((tr), IRT_TRUE))
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#define tref_isstr(tr) (tref_istype((tr), IRT_STR))
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#define tref_isfunc(tr) (tref_istype((tr), IRT_FUNC))
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#define tref_iscdata(tr) (tref_istype((tr), IRT_CDATA))
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#define tref_istab(tr) (tref_istype((tr), IRT_TAB))
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#define tref_isudata(tr) (tref_istype((tr), IRT_UDATA))
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#define tref_isnum(tr) (tref_istype((tr), IRT_NUM))
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#define tref_isint(tr) (tref_istype((tr), IRT_INT))
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#define tref_isbool(tr) (tref_typerange((tr), IRT_FALSE, IRT_TRUE))
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#define tref_ispri(tr) (tref_typerange((tr), IRT_NIL, IRT_TRUE))
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#define tref_istruecond(tr) (!tref_typerange((tr), IRT_NIL, IRT_FALSE))
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#define tref_isinteger(tr) (tref_typerange((tr), IRT_I8, IRT_INT))
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#define tref_isnumber(tr) (tref_typerange((tr), IRT_NUM, IRT_INT))
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#define tref_isnumber_str(tr) (tref_isnumber((tr)) || tref_isstr((tr)))
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#define tref_isgcv(tr) (tref_typerange((tr), IRT_STR, IRT_UDATA))
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#define tref_isk(tr) (irref_isk(tref_ref((tr))))
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#define tref_isk2(tr1, tr2) (irref_isk(tref_ref((tr1) | (tr2))))
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#define TREF_PRI(t) (TREF(REF_NIL-(t), (t)))
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#define TREF_NIL (TREF_PRI(IRT_NIL))
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#define TREF_FALSE (TREF_PRI(IRT_FALSE))
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#define TREF_TRUE (TREF_PRI(IRT_TRUE))
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/* -- IR format ----------------------------------------------------------- */
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/* IR instruction format (64 bit).
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**
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** 16 16 8 8 8 8
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** +-------+-------+---+---+---+---+
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** | op1 | op2 | t | o | r | s |
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** +-------+-------+---+---+---+---+
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** | op12/i/gco | ot | prev | (alternative fields in union)
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** +---------------+-------+-------+
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** 32 16 16
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**
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** prev is only valid prior to register allocation and then reused for r + s.
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*/
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typedef union IRIns {
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struct {
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LJ_ENDIAN_LOHI(
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IRRef1 op1; /* IR operand 1. */
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, IRRef1 op2; /* IR operand 2. */
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)
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IROpT ot; /* IR opcode and type (overlaps t and o). */
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IRRef1 prev; /* Previous ins in same chain (overlaps r and s). */
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};
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struct {
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IRRef2 op12; /* IR operand 1 and 2 (overlaps op1 and op2). */
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LJ_ENDIAN_LOHI(
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IRType1 t; /* IR type. */
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, IROp1 o; /* IR opcode. */
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)
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LJ_ENDIAN_LOHI(
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uint8_t r; /* Register allocation (overlaps prev). */
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, uint8_t s; /* Spill slot allocation (overlaps prev). */
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)
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};
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int32_t i; /* 32 bit signed integer literal (overlaps op12). */
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GCRef gcr; /* GCobj constant (overlaps op12). */
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MRef ptr; /* Pointer constant (overlaps op12). */
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} IRIns;
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#define ir_kgc(ir) check_exp((ir)->o == IR_KGC, gcref((ir)->gcr))
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#define ir_kstr(ir) (gco2str(ir_kgc((ir))))
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#define ir_ktab(ir) (gco2tab(ir_kgc((ir))))
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#define ir_kfunc(ir) (gco2func(ir_kgc((ir))))
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#define ir_kcdata(ir) (gco2cd(ir_kgc((ir))))
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#define ir_knum(ir) check_exp((ir)->o == IR_KNUM, mref((ir)->ptr, cTValue))
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#define ir_kint64(ir) check_exp((ir)->o == IR_KINT64, mref((ir)->ptr,cTValue))
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#define ir_k64(ir) \
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check_exp((ir)->o == IR_KNUM || (ir)->o == IR_KINT64, mref((ir)->ptr,cTValue))
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#define ir_kptr(ir) \
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check_exp((ir)->o == IR_KPTR || (ir)->o == IR_KKPTR, mref((ir)->ptr, void))
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/* A store or any other op with a non-weak guard has a side-effect. */
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static LJ_AINLINE int ir_sideeff(IRIns *ir)
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{
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return (((ir->t.irt | ~IRT_GUARD) & lj_ir_mode[ir->o]) >= IRM_S);
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}
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LJ_STATIC_ASSERT((int)IRT_GUARD == (int)IRM_W);
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#endif
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