402 lines
15 KiB
C
402 lines
15 KiB
C
/*
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* Debugger x86_64 specific functions
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*
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* Copyright 2004 Vincent Béron
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* Copyright 2009 Eric Pouech
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "debugger.h"
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#include "wine/debug.h"
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WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
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#if defined(__x86_64__)
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#define STEP_FLAG 0x00000100 /* single step flag */
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static unsigned be_x86_64_get_addr(HANDLE hThread, const CONTEXT* ctx,
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enum be_cpu_addr bca, ADDRESS64* addr)
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{
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addr->Mode = AddrModeFlat;
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switch (bca)
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{
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case be_cpu_addr_pc:
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addr->Segment = ctx->SegCs;
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addr->Offset = ctx->Rip;
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return TRUE;
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case be_cpu_addr_stack:
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addr->Segment = ctx->SegSs;
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addr->Offset = ctx->Rsp;
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return TRUE;
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case be_cpu_addr_frame:
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addr->Segment = ctx->SegSs;
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addr->Offset = ctx->Rbp;
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return TRUE;
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default:
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addr->Mode = -1;
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return FALSE;
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}
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}
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static unsigned be_x86_64_get_register_info(int regno, enum be_cpu_addr* kind)
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{
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/* this is true when running in 32bit mode... and wrong in 64 :-/ */
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switch (regno)
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{
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case CV_AMD64_RIP: *kind = be_cpu_addr_pc; return TRUE;
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case CV_AMD64_EBP: *kind = be_cpu_addr_frame; return TRUE;
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case CV_AMD64_ESP: *kind = be_cpu_addr_stack; return TRUE;
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}
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return FALSE;
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}
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static void be_x86_64_single_step(CONTEXT* ctx, unsigned enable)
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{
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if (enable) ctx->EFlags |= STEP_FLAG;
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else ctx->EFlags &= ~STEP_FLAG;
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}
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static void be_x86_64_print_context(HANDLE hThread, const CONTEXT* ctx,
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int all_regs)
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{
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static const char flags[] = "aVR-N--ODITSZ-A-P-C";
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char buf[33];
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int i;
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strcpy(buf, flags);
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for (i = 0; buf[i]; i++)
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if (buf[i] != '-' && !(ctx->EFlags & (1 << (sizeof(flags) - 2 - i))))
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buf[i] = ' ';
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dbg_printf("Register dump:\n");
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dbg_printf(" rip:%016lx rsp:%016lx rbp:%016lx eflags:%08x (%s)\n",
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ctx->Rip, ctx->Rsp, ctx->Rbp, ctx->EFlags, buf);
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dbg_printf(" rax:%016lx rbx:%016lx rcx:%016lx rdx:%016lx\n",
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ctx->Rax, ctx->Rbx, ctx->Rcx, ctx->Rdx);
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dbg_printf(" rsi:%016lx rdi:%016lx r8:%016lx r9:%016lx r10:%016lx\n",
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ctx->Rsi, ctx->Rdi, ctx->R8, ctx->R9, ctx->R10 );
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dbg_printf(" r11:%016lx r12:%016lx r13:%016lx r14:%016lx r15:%016lx\n",
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ctx->R11, ctx->R12, ctx->R13, ctx->R14, ctx->R15 );
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if (all_regs) dbg_printf( "Floating point x86_64 dump not implemented\n" );
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}
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static void be_x86_64_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
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{
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}
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static struct dbg_internal_var be_x86_64_ctx[] =
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{
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{CV_AMD64_AL, "AL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_char_int},
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{CV_AMD64_BL, "BL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_char_int},
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{CV_AMD64_CL, "CL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_char_int},
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{CV_AMD64_DL, "DL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_char_int},
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{CV_AMD64_AH, "AH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rax)+1), dbg_itype_unsigned_char_int},
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{CV_AMD64_BH, "BH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rbx)+1), dbg_itype_unsigned_char_int},
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{CV_AMD64_CH, "CH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rcx)+1), dbg_itype_unsigned_char_int},
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{CV_AMD64_DH, "DH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Rdx)+1), dbg_itype_unsigned_char_int},
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{CV_AMD64_AX, "AX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_short_int},
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{CV_AMD64_BX, "BX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_short_int},
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{CV_AMD64_CX, "CX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_short_int},
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{CV_AMD64_DX, "DX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_short_int},
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{CV_AMD64_SP, "SP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsp), dbg_itype_unsigned_short_int},
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{CV_AMD64_BP, "BP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbp), dbg_itype_unsigned_short_int},
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{CV_AMD64_SI, "SI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsi), dbg_itype_unsigned_short_int},
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{CV_AMD64_DI, "DI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdi), dbg_itype_unsigned_short_int},
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{CV_AMD64_EAX, "EAX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_int},
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{CV_AMD64_EBX, "EBX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_int},
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{CV_AMD64_ECX, "ECX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_int},
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{CV_AMD64_EDX, "EDX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_int},
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{CV_AMD64_ESP, "ESP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsp), dbg_itype_unsigned_int},
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{CV_AMD64_EBP, "EBP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbp), dbg_itype_unsigned_int},
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{CV_AMD64_ESI, "ESI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsi), dbg_itype_unsigned_int},
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{CV_AMD64_EDI, "EDI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdi), dbg_itype_unsigned_int},
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{CV_AMD64_ES, "ES", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
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{CV_AMD64_CS, "CS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
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{CV_AMD64_SS, "SS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
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{CV_AMD64_DS, "DS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
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{CV_AMD64_FS, "FS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
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{CV_AMD64_GS, "GS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
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{CV_AMD64_FLAGS, "FLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
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{CV_AMD64_EFLAGS, "EFLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
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{CV_AMD64_RIP, "RIP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rip), dbg_itype_unsigned_int},
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{CV_AMD64_RAX, "RAX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rax), dbg_itype_unsigned_long_int},
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{CV_AMD64_RBX, "RBX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbx), dbg_itype_unsigned_long_int},
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{CV_AMD64_RCX, "RCX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rcx), dbg_itype_unsigned_long_int},
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{CV_AMD64_RDX, "RDX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdx), dbg_itype_unsigned_long_int},
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{CV_AMD64_RSP, "RSP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsp), dbg_itype_unsigned_long_int},
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{CV_AMD64_RBP, "RBP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rbp), dbg_itype_unsigned_long_int},
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{CV_AMD64_RSI, "RSI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rsi), dbg_itype_unsigned_long_int},
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{CV_AMD64_RDI, "RDI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Rdi), dbg_itype_unsigned_long_int},
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{CV_AMD64_R8, "R8", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R8), dbg_itype_unsigned_long_int},
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{CV_AMD64_R9, "R9", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R9), dbg_itype_unsigned_long_int},
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{CV_AMD64_R10, "R10", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R10), dbg_itype_unsigned_long_int},
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{CV_AMD64_R11, "R11", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R11), dbg_itype_unsigned_long_int},
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{CV_AMD64_R12, "R12", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R12), dbg_itype_unsigned_long_int},
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{CV_AMD64_R13, "R13", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R13), dbg_itype_unsigned_long_int},
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{CV_AMD64_R14, "R14", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R14), dbg_itype_unsigned_long_int},
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{CV_AMD64_R15, "R15", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, R15), dbg_itype_unsigned_long_int},
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{0, NULL, 0, dbg_itype_none}
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};
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static const struct dbg_internal_var* be_x86_64_init_registers(CONTEXT* ctx)
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{
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struct dbg_internal_var* div;
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for (div = be_x86_64_ctx; div->name; div++)
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div->pval = (DWORD_PTR*)((char*)ctx + (DWORD_PTR)div->pval);
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return be_x86_64_ctx;
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}
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static unsigned be_x86_64_is_step_over_insn(const void* insn)
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{
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dbg_printf("not done step_over_insn\n");
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return FALSE;
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}
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static unsigned be_x86_64_is_function_return(const void* insn)
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{
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dbg_printf("not done is_function_return\n");
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return FALSE;
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}
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static unsigned be_x86_64_is_break_insn(const void* insn)
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{
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dbg_printf("not done is_break_insn\n");
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return FALSE;
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}
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static unsigned be_x86_64_is_func_call(const void* insn, ADDRESS64* callee)
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{
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dbg_printf("not done is_func_call\n");
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return FALSE;
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}
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static void be_x86_64_disasm_one_insn(ADDRESS64* addr, int display)
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{
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dbg_printf("Disasm NIY\n");
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}
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#define DR7_CONTROL_SHIFT 16
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#define DR7_CONTROL_SIZE 4
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#define DR7_RW_EXECUTE (0x0)
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#define DR7_RW_WRITE (0x1)
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#define DR7_RW_READ (0x3)
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#define DR7_LEN_1 (0x0)
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#define DR7_LEN_2 (0x4)
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#define DR7_LEN_4 (0xC)
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#define DR7_LOCAL_ENABLE_SHIFT 0
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#define DR7_GLOBAL_ENABLE_SHIFT 1
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#define DR7_ENABLE_SIZE 2
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#define DR7_LOCAL_ENABLE_MASK (0x55)
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#define DR7_GLOBAL_ENABLE_MASK (0xAA)
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#define DR7_CONTROL_RESERVED (0xFC00)
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#define DR7_LOCAL_SLOWDOWN (0x100)
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#define DR7_GLOBAL_SLOWDOWN (0x200)
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#define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
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#define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
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static inline int be_x86_64_get_unused_DR(CONTEXT* ctx, DWORD64** r)
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{
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if (!IS_DR7_SET(ctx->Dr7, 0))
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{
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*r = &ctx->Dr0;
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return 0;
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}
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if (!IS_DR7_SET(ctx->Dr7, 1))
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{
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*r = &ctx->Dr1;
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return 1;
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}
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if (!IS_DR7_SET(ctx->Dr7, 2))
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{
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*r = &ctx->Dr2;
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return 2;
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}
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if (!IS_DR7_SET(ctx->Dr7, 3))
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{
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*r = &ctx->Dr3;
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return 3;
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}
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dbg_printf("All hardware registers have been used\n");
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return -1;
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}
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static unsigned be_x86_64_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
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CONTEXT* ctx, enum be_xpoint_type type,
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void* addr, unsigned long* val, unsigned size)
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{
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unsigned char ch;
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SIZE_T sz;
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DWORD64 *pr;
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int reg;
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unsigned long bits;
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switch (type)
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{
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case be_xpoint_break:
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if (size != 0) return 0;
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if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
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*val = ch;
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ch = 0xcc;
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if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
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break;
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case be_xpoint_watch_exec:
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bits = DR7_RW_EXECUTE;
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goto hw_bp;
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case be_xpoint_watch_read:
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bits = DR7_RW_READ;
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goto hw_bp;
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case be_xpoint_watch_write:
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bits = DR7_RW_WRITE;
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hw_bp:
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if ((reg = be_x86_64_get_unused_DR(ctx, &pr)) == -1) return 0;
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*pr = (DWORD64)addr;
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if (type != be_xpoint_watch_exec) switch (size)
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{
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case 4: bits |= DR7_LEN_4; break;
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case 2: bits |= DR7_LEN_2; break;
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case 1: bits |= DR7_LEN_1; break;
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default: return 0;
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}
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*val = reg;
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/* clear old values */
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ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
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/* set the correct ones */
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ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
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ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
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break;
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default:
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dbg_printf("Unknown bp type %c\n", type);
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return 0;
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}
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return 1;
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}
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static unsigned be_x86_64_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
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CONTEXT* ctx, enum be_xpoint_type type,
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void* addr, unsigned long val, unsigned size)
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{
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SIZE_T sz;
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unsigned char ch;
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switch (type)
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{
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case be_xpoint_break:
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if (size != 0) return 0;
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if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
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if (ch != (unsigned char)0xCC)
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WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
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ch, (unsigned long)addr);
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ch = (unsigned char)val;
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if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
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break;
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case be_xpoint_watch_exec:
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case be_xpoint_watch_read:
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case be_xpoint_watch_write:
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/* simply disable the entry */
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ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
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break;
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default:
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dbg_printf("Unknown bp type %c\n", type);
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return 0;
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}
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return 1;
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}
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static unsigned be_x86_64_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
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{
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return ctx->Dr6 & (1 << idx);
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}
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static void be_x86_64_clear_watchpoint(CONTEXT* ctx, unsigned idx)
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{
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ctx->Dr6 &= ~(1 << idx);
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}
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static int be_x86_64_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
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{
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if (way)
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{
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ctx->Rip--;
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return -1;
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}
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ctx->Rip++;
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return 1;
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}
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static int be_x86_64_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
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unsigned ext_sign, LONGLONG* ret)
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{
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if (size != 1 && size != 2 && size != 4 && size != 8 && size != 16)
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return FALSE;
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memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
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/* FIXME: this assumes that debuggee and debugger use the same
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* integral representation
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*/
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if (!memory_read_value(lvalue, size, ret)) return FALSE;
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/* propagate sign information */
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if (ext_sign && size < 16 && (*ret >> (size * 8 - 1)) != 0)
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{
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ULONGLONG neg = -1;
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*ret |= neg << (size * 8);
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}
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return TRUE;
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}
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static int be_x86_64_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
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long double* ret)
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{
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dbg_printf("not done fetch_float\n");
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return FALSE;
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}
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struct backend_cpu be_x86_64 =
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{
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IMAGE_FILE_MACHINE_AMD64,
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be_cpu_linearize,
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be_cpu_build_addr,
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be_x86_64_get_addr,
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be_x86_64_get_register_info,
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be_x86_64_single_step,
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be_x86_64_print_context,
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be_x86_64_print_segment_info,
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be_x86_64_init_registers,
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be_x86_64_is_step_over_insn,
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be_x86_64_is_function_return,
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be_x86_64_is_break_insn,
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be_x86_64_is_func_call,
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be_x86_64_disasm_one_insn,
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be_x86_64_insert_Xpoint,
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be_x86_64_remove_Xpoint,
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be_x86_64_is_watchpoint_set,
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be_x86_64_clear_watchpoint,
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be_x86_64_adjust_pc_for_break,
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be_x86_64_fetch_integer,
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be_x86_64_fetch_float,
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};
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#endif
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