131 lines
4.1 KiB
C
131 lines
4.1 KiB
C
/*
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* File cpu_arm.c
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*
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* Copyright (C) 2009-2009, Eric Pouech
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* Copyright (C) 2010, André Hentschel
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <assert.h>
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#include "ntstatus.h"
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#define WIN32_NO_STATUS
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#include "dbghelp_private.h"
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#include "winternl.h"
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#include "wine/debug.h"
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WINE_DEFAULT_DEBUG_CHANNEL(dbghelp);
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static unsigned arm_get_addr(HANDLE hThread, const CONTEXT* ctx,
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enum cpu_addr ca, ADDRESS64* addr)
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{
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addr->Mode = AddrModeFlat;
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addr->Segment = 0; /* don't need segment */
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switch (ca)
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{
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#ifdef __arm__
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case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE;
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case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
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case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
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#endif
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default: addr->Mode = -1;
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return FALSE;
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}
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}
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static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
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{
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FIXME("not done for ARM\n");
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return FALSE;
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}
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static unsigned arm_map_dwarf_register(unsigned regno)
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{
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if (regno <= 15) return CV_ARM_R0 + regno;
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if (regno == 128) return CV_ARM_CPSR;
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FIXME("Don't know how to map register %d\n", regno);
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return CV_ARM_NOREG;
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}
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static void* arm_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* size)
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{
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#ifdef __arm__
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switch (regno)
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{
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case CV_ARM_R0 + 0: *size = sizeof(ctx->R0); return &ctx->R0;
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case CV_ARM_R0 + 1: *size = sizeof(ctx->R1); return &ctx->R1;
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case CV_ARM_R0 + 2: *size = sizeof(ctx->R2); return &ctx->R2;
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case CV_ARM_R0 + 3: *size = sizeof(ctx->R3); return &ctx->R3;
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case CV_ARM_R0 + 4: *size = sizeof(ctx->R4); return &ctx->R4;
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case CV_ARM_R0 + 5: *size = sizeof(ctx->R5); return &ctx->R5;
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case CV_ARM_R0 + 6: *size = sizeof(ctx->R6); return &ctx->R6;
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case CV_ARM_R0 + 7: *size = sizeof(ctx->R7); return &ctx->R7;
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case CV_ARM_R0 + 8: *size = sizeof(ctx->R8); return &ctx->R8;
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case CV_ARM_R0 + 9: *size = sizeof(ctx->R9); return &ctx->R9;
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case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
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case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
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case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
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case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
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case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
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case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
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case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
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}
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#endif
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FIXME("Unknown register %x\n", regno);
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return NULL;
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}
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static const char* arm_fetch_regname(unsigned regno)
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{
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switch (regno)
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{
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case CV_ARM_R0 + 0: return "r0";
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case CV_ARM_R0 + 1: return "r1";
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case CV_ARM_R0 + 2: return "r2";
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case CV_ARM_R0 + 3: return "r3";
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case CV_ARM_R0 + 4: return "r4";
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case CV_ARM_R0 + 5: return "r5";
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case CV_ARM_R0 + 6: return "r6";
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case CV_ARM_R0 + 7: return "r7";
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case CV_ARM_R0 + 8: return "r8";
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case CV_ARM_R0 + 9: return "r9";
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case CV_ARM_R0 + 10: return "r10";
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case CV_ARM_R0 + 11: return "r11";
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case CV_ARM_R0 + 12: return "r12";
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case CV_ARM_SP: return "sp";
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case CV_ARM_LR: return "lr";
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case CV_ARM_PC: return "pc";
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case CV_ARM_CPSR: return "cpsr";
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}
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FIXME("Unknown register %x\n", regno);
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return NULL;
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}
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struct cpu cpu_arm = {
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IMAGE_FILE_MACHINE_ARM,
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4,
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CV_ARM_R0 + 11,
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arm_get_addr,
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arm_stack_walk,
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NULL,
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arm_map_dwarf_register,
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arm_fetch_context_reg,
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arm_fetch_regname,
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};
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