245 lines
6.4 KiB
C
245 lines
6.4 KiB
C
/*
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* interlocked functions
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*
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* Copyright 1996 Alexandre Julliard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h"
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#include "wine/port.h"
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#ifdef __i386__
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#ifdef __GNUC__
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__ASM_GLOBAL_FUNC(interlocked_cmpxchg,
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"movl 12(%esp),%eax\n\t"
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"movl 8(%esp),%ecx\n\t"
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"movl 4(%esp),%edx\n\t"
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"lock; cmpxchgl %ecx,(%edx)\n\t"
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"ret");
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__ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
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"movl 12(%esp),%eax\n\t"
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"movl 8(%esp),%ecx\n\t"
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"movl 4(%esp),%edx\n\t"
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"lock; cmpxchgl %ecx,(%edx)\n\t"
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"ret");
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__ASM_GLOBAL_FUNC(interlocked_xchg,
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"movl 8(%esp),%eax\n\t"
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"movl 4(%esp),%edx\n\t"
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"lock; xchgl %eax,(%edx)\n\t"
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"ret");
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__ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
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"movl 8(%esp),%eax\n\t"
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"movl 4(%esp),%edx\n\t"
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"lock; xchgl %eax,(%edx)\n\t"
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"ret");
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__ASM_GLOBAL_FUNC(interlocked_xchg_add,
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"movl 8(%esp),%eax\n\t"
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"movl 4(%esp),%edx\n\t"
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"lock; xaddl %eax,(%edx)\n\t"
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"ret");
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#elif defined(_MSC_VER)
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__declspec(naked) long interlocked_cmpxchg( long *dest, long xchg, long compare )
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{
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__asm mov eax, 12[esp];
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__asm mov ecx, 8[esp];
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__asm mov edx, 4[esp];
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__asm lock cmpxchg [edx], ecx;
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__asm ret;
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}
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__declspec(naked) void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
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{
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__asm mov eax, 12[esp];
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__asm mov ecx, 8[esp];
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__asm mov edx, 4[esp];
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__asm lock cmpxchg [edx], ecx;
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__asm ret;
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}
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__declspec(naked) long interlocked_xchg( long *dest, long val )
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{
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__asm mov eax, 8[esp];
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__asm mov edx, 4[esp];
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__asm lock xchg [edx], eax;
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__asm ret;
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}
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__declspec(naked) void *interlocked_xchg_ptr( void **dest, void *val )
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{
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__asm mov eax, 8[esp];
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__asm mov edx, 4[esp];
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__asm lock xchg [edx], eax;
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__asm ret;
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}
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__declspec(naked) long interlocked_xchg_add( long *dest, long incr )
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{
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__asm mov eax, 8[esp];
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__asm mov edx, 4[esp];
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__asm lock xadd [edx], eax;
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__asm ret;
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}
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#else
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# error You must implement the interlocked* functions for your compiler
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#endif
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#elif defined(__powerpc__)
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void* interlocked_cmpxchg_ptr( void **dest, void* xchg, void* compare)
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{
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long ret = 0;
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long scratch;
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__asm__ __volatile__(
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"0: lwarx %0,0,%2 ;"
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" xor. %1,%4,%0;"
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" bne 1f;"
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" stwcx. %3,0,%2;"
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" bne- 0b;"
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"1: "
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: "=&r"(ret), "=&r"(scratch)
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: "r"(dest), "r"(xchg), "r"(compare)
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: "cr0","memory");
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return (void*)ret;
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}
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long interlocked_cmpxchg( long *dest, long xchg, long compare)
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{
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long ret = 0;
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long scratch;
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__asm__ __volatile__(
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"0: lwarx %0,0,%2 ;"
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" xor. %1,%4,%0;"
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" bne 1f;"
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" stwcx. %3,0,%2;"
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" bne- 0b;"
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"1: "
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: "=&r"(ret), "=&r"(scratch)
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: "r"(dest), "r"(xchg), "r"(compare)
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: "cr0","memory");
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return ret;
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}
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long interlocked_xchg_add( long *dest, long incr )
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{
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long ret = 0;
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long zero = 0;
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__asm__ __volatile__(
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"0: lwarx %0, %3, %1;"
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" add %0, %2, %0;"
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" stwcx. %0, %3, %1;"
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" bne- 0b;"
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: "=&r" (ret)
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: "r"(dest), "r"(incr), "r"(zero)
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: "cr0", "memory"
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);
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return ret-incr;
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}
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long interlocked_xchg( long* dest, long val )
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{
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long ret = 0;
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__asm__ __volatile__(
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"0: lwarx %0,0,%1 ;"
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" stwcx. %2,0,%1;"
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" bne- 0b;"
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: "=&r"(ret)
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: "r"(dest), "r"(val)
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: "cr0","memory");
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return ret;
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}
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void* interlocked_xchg_ptr( void** dest, void* val )
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{
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void *ret = NULL;
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__asm__ __volatile__(
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"0: lwarx %0,0,%1 ;"
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" stwcx. %2,0,%1;"
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" bne- 0b;"
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: "=&r"(ret)
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: "r"(dest), "r"(val)
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: "cr0","memory");
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return ret;
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}
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#elif defined(__sparc__) && defined(__sun__)
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/*
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* As the earlier Sparc processors lack necessary atomic instructions,
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* I'm simply falling back to the library-provided _lwp_mutex routines
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* to ensure mutual exclusion in a way appropriate for the current
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* architecture.
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*
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* FIXME: If we have the compare-and-swap instruction (Sparc v9 and above)
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* we could use this to speed up the Interlocked operations ...
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*/
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#include <synch.h>
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static lwp_mutex_t interlocked_mutex = DEFAULTMUTEX;
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long interlocked_cmpxchg( long *dest, long xchg, long compare )
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{
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_lwp_mutex_lock( &interlocked_mutex );
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if (*dest == compare) *dest = xchg;
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else compare = *dest;
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_lwp_mutex_unlock( &interlocked_mutex );
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return compare;
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}
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void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
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{
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_lwp_mutex_lock( &interlocked_mutex );
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if (*dest == compare) *dest = xchg;
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else compare = *dest;
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_lwp_mutex_unlock( &interlocked_mutex );
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return compare;
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}
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long interlocked_xchg( long *dest, long val )
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{
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long retv;
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_lwp_mutex_lock( &interlocked_mutex );
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retv = *dest;
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*dest = val;
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_lwp_mutex_unlock( &interlocked_mutex );
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return retv;
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}
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void *interlocked_xchg_ptr( void **dest, void *val )
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{
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long retv;
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_lwp_mutex_lock( &interlocked_mutex );
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retv = *dest;
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*dest = val;
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_lwp_mutex_unlock( &interlocked_mutex );
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return retv;
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}
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long interlocked_xchg_add( long *dest, long incr )
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{
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long retv;
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_lwp_mutex_lock( &interlocked_mutex );
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retv = *dest;
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*dest += incr;
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_lwp_mutex_unlock( &interlocked_mutex );
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return retv;
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}
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#else
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# error You must implement the interlocked* functions for your CPU
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#endif
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