132 lines
6.7 KiB
C
132 lines
6.7 KiB
C
/*
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* Debugger CPU backend definitions
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*
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* Copyright 2004 Eric Pouech
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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enum be_cpu_addr {be_cpu_addr_pc, be_cpu_addr_stack, be_cpu_addr_frame};
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enum be_xpoint_type {be_xpoint_break, be_xpoint_watch_exec, be_xpoint_watch_read,
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be_xpoint_watch_write, be_xpoint_free=-1};
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struct gdb_register
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{
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const char *feature;
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const char *name;
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const char *type;
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size_t offset;
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size_t length;
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};
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struct backend_cpu
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{
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const DWORD machine;
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const DWORD pointer_size;
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/* ------------------------------------------------------------------------------
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* address manipulation
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* ------------------------------------------------------------------------------ */
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/* Linearizes an address. Only CPUs with segmented address model need this.
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* Otherwise, implementation is straightforward (be_cpu_linearize will do)
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*/
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void* (*linearize)(HANDLE hThread, const ADDRESS64*);
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/* Fills in an ADDRESS64 structure from a segment & an offset. CPUs without
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* segment address model should use 0 as seg. Required method to fill
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* in an ADDRESS64 (except an linear one).
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* Non segmented CPU shall use be_cpu_build_addr
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*/
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BOOL (*build_addr)(HANDLE hThread, const dbg_ctx_t *ctx,
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ADDRESS64* addr, unsigned seg,
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DWORD64 offset);
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/* Retrieves in addr an address related to the context (program counter, stack
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* pointer, frame pointer)
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*/
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BOOL (*get_addr)(HANDLE hThread, const dbg_ctx_t *ctx,
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enum be_cpu_addr, ADDRESS64* addr);
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/* returns which kind of information a given register number refers to */
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BOOL (*get_register_info)(int regno, enum be_cpu_addr* kind);
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/* -------------------------------------------------------------------------------
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* context manipulation
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* ------------------------------------------------------------------------------- */
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/* Enables/disables CPU single step mode (depending on enable) */
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void (*single_step)(dbg_ctx_t *ctx, BOOL enable);
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/* Dumps out the content of the context */
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void (*print_context)(HANDLE hThread, const dbg_ctx_t *ctx, int all_regs);
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/* Prints information about segments. Non segmented CPU should leave this
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* function empty
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*/
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void (*print_segment_info)(HANDLE hThread, const dbg_ctx_t *ctx);
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/* all the CONTEXT's relative variables, bound to this CPU */
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const struct dbg_internal_var* context_vars;
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/* -------------------------------------------------------------------------------
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* code inspection
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* -------------------------------------------------------------------------------*/
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/* Check whether the instruction at addr is an insn to step over
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* (like function call, interruption...)
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*/
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BOOL (*is_step_over_insn)(const void* addr);
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/* Check whether instruction at 'addr' is the return from a function call */
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BOOL (*is_function_return)(const void* addr);
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/* Check whether instruction at 'addr' is the CPU break instruction. On i386,
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* it's INT3 (0xCC)
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*/
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BOOL (*is_break_insn)(const void*);
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/* Check whether instruction at 'addr' is a function call */
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BOOL (*is_function_call)(const void* insn, ADDRESS64* callee);
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/* Check whether instruction at 'addr' is a jump */
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BOOL (*is_jump)(const void* insn, ADDRESS64* jumpee);
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/* Ask for disassembling one instruction. If display is true, assembly code
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* will be printed. In all cases, 'addr' is advanced at next instruction
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*/
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void (*disasm_one_insn)(ADDRESS64* addr, int display);
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/* -------------------------------------------------------------------------------
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* break points / watchpoints handling
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* -------------------------------------------------------------------------------*/
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/* Inserts an Xpoint in the CPU context and/or debuggee address space */
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BOOL (*insert_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
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dbg_ctx_t *ctx, enum be_xpoint_type type,
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void* addr, unsigned *val, unsigned size);
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/* Removes an Xpoint in the CPU context and/or debuggee address space */
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BOOL (*remove_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
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dbg_ctx_t *ctx, enum be_xpoint_type type,
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void* addr, unsigned val, unsigned size);
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/* Checks whether a given watchpoint has been triggered */
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BOOL (*is_watchpoint_set)(const dbg_ctx_t *ctx, unsigned idx);
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/* Clears the watchpoint indicator */
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void (*clear_watchpoint)(dbg_ctx_t *ctx, unsigned idx);
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/* After a break instruction is executed, in the corresponding exception handler,
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* some CPUs report the address of the insn after the break insn, some others
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* report the address of the break insn itself.
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* This function lets adjust the context PC to reflect this behavior.
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*/
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int (*adjust_pc_for_break)(dbg_ctx_t *ctx, BOOL way);
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/* -------------------------------------------------------------------------------
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* basic type read/write
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* -------------------------------------------------------------------------------*/
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BOOL (*get_context)(HANDLE thread, dbg_ctx_t *ctx);
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BOOL (*set_context)(HANDLE thread, const dbg_ctx_t *ctx);
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const struct gdb_register *gdb_register_map;
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const size_t gdb_num_regs;
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};
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/* some handy functions for non segmented CPUs */
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void* be_cpu_linearize(HANDLE hThread, const ADDRESS64*);
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BOOL be_cpu_build_addr(HANDLE hThread, const dbg_ctx_t *ctx, ADDRESS64* addr,
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unsigned seg, DWORD64 offset);
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