server: Set RW and LEN bits of DR7 before setting DR0-DR3.
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382d953872
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fa179b1c26
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@ -509,12 +509,10 @@ static void check_debug_registers(int test_num, const struct dbgreg_test *test)
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CHECK_DEBUG_REG(0, ~0);
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CHECK_DEBUG_REG(1, ~0);
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if (test_num == 2) todo_wine
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CHECK_DEBUG_REG(2, ~0);
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if (test_num == 2) todo_wine
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CHECK_DEBUG_REG(3, ~0);
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CHECK_DEBUG_REG(6, 0x0f);
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if (test_num == 2) todo_wine
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CHECK_DEBUG_REG(7, ~0xdc00);
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}
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@ -593,6 +593,8 @@ void set_thread_context( struct thread *thread, const context_t *context, unsign
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switch (context->cpu)
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{
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case CPU_x86:
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/* Linux 2.6.33+ does DR0-DR3 alignment validation, so it has to know LEN bits first */
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if (ptrace( PTRACE_POKEUSER, pid, DR_OFFSET(7), context->debug.i386_regs.dr7 & 0xffff0000 ) == -1) goto error;
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if (ptrace( PTRACE_POKEUSER, pid, DR_OFFSET(0), context->debug.i386_regs.dr0 ) == -1) goto error;
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if (thread->context) thread->context->debug.i386_regs.dr0 = context->debug.i386_regs.dr0;
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if (ptrace( PTRACE_POKEUSER, pid, DR_OFFSET(1), context->debug.i386_regs.dr1 ) == -1) goto error;
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@ -607,6 +609,7 @@ void set_thread_context( struct thread *thread, const context_t *context, unsign
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if (thread->context) thread->context->debug.i386_regs.dr7 = context->debug.i386_regs.dr7;
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break;
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case CPU_x86_64:
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if (ptrace( PTRACE_POKEUSER, pid, DR_OFFSET(7), context->debug.x86_64_regs.dr7 & 0xffff0000 ) == -1) goto error;
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if (ptrace( PTRACE_POKEUSER, pid, DR_OFFSET(0), context->debug.x86_64_regs.dr0 ) == -1) goto error;
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if (thread->context) thread->context->debug.x86_64_regs.dr0 = context->debug.x86_64_regs.dr0;
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if (ptrace( PTRACE_POKEUSER, pid, DR_OFFSET(1), context->debug.x86_64_regs.dr1 ) == -1) goto error;
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