diff --git a/dlls/dbghelp/cpu_i386.c b/dlls/dbghelp/cpu_i386.c
index cf7e149c721..32d600c3237 100644
--- a/dlls/dbghelp/cpu_i386.c
+++ b/dlls/dbghelp/cpu_i386.c
@@ -404,10 +404,57 @@ done_err:
     return FALSE;
 }
 
+static unsigned i386_map_dwarf_register(unsigned regno)
+{
+    unsigned    reg;
+
+    switch (regno)
+    {
+    case  0: reg = CV_REG_EAX; break;
+    case  1: reg = CV_REG_ECX; break;
+    case  2: reg = CV_REG_EDX; break;
+    case  3: reg = CV_REG_EBX; break;
+    case  4: reg = CV_REG_ESP; break;
+    case  5: reg = CV_REG_EBP; break;
+    case  6: reg = CV_REG_ESI; break;
+    case  7: reg = CV_REG_EDI; break;
+    case  8: reg = CV_REG_EIP; break;
+    case  9: reg = CV_REG_EFLAGS; break;
+    case 10: reg = CV_REG_CS;  break;
+    case 11: reg = CV_REG_SS;  break;
+    case 12: reg = CV_REG_DS;  break;
+    case 13: reg = CV_REG_ES;  break;
+    case 14: reg = CV_REG_FS;  break;
+    case 15: reg = CV_REG_GS;  break;
+    case 16: case 17: case 18: case 19:
+    case 20: case 21: case 22: case 23:
+        reg = CV_REG_ST0 + regno - 16; break;
+    case 24: reg = CV_REG_CTRL; break;
+    case 25: reg = CV_REG_STAT; break;
+    case 26: reg = CV_REG_TAG; break;
+/*
+reg: fiseg 27
+reg: fioff 28
+reg: foseg 29
+reg: fooff 30
+reg: fop   31
+*/
+    case 32: case 33: case 34: case 35:
+    case 36: case 37: case 38: case 39:
+        reg = CV_REG_XMM0 + regno - 32; break;
+    case 40: reg = CV_REG_MXCSR; break;
+    default:
+        FIXME("Don't know how to map register %d\n", regno);
+        return 0;
+    }
+    return reg;
+}
+
 struct cpu cpu_i386 = {
     IMAGE_FILE_MACHINE_I386,
     4,
     i386_get_addr,
     i386_stack_walk,
     NULL,
+    i386_map_dwarf_register,
 };
diff --git a/dlls/dbghelp/cpu_ppc.c b/dlls/dbghelp/cpu_ppc.c
index 16e4a979d01..9a17aee93e5 100644
--- a/dlls/dbghelp/cpu_ppc.c
+++ b/dlls/dbghelp/cpu_ppc.c
@@ -54,10 +54,17 @@ static BOOL ppc_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CON
     return FALSE;
 }
 
+static unsigned ppc_map_dwarf_register(unsigned regno)
+{
+    FIXME("not done\n");
+    return 0;
+}
+
 struct cpu cpu_ppc = {
     IMAGE_FILE_MACHINE_POWERPC,
     4,
     ppc_get_addr,
     ppc_stack_walk,
     NULL,
+    ppc_map_dwarf_register,
 };
diff --git a/dlls/dbghelp/cpu_x86_64.c b/dlls/dbghelp/cpu_x86_64.c
index fde771cbca2..43af5e0666d 100644
--- a/dlls/dbghelp/cpu_x86_64.c
+++ b/dlls/dbghelp/cpu_x86_64.c
@@ -579,10 +579,66 @@ static void*    x86_64_find_runtime_function(struct module* module, DWORD64 addr
     return NULL;
 }
 
+static unsigned x86_64_map_dwarf_register(unsigned regno)
+{
+    unsigned    reg;
+
+    if (regno >= 17 && regno <= 24)
+        reg = CV_AMD64_XMM0 + regno - 17;
+    else if (regno >= 25 && regno <= 32)
+        reg = CV_AMD64_XMM8 + regno - 25;
+    else if (regno >= 33 && regno <= 40)
+        reg = CV_AMD64_ST0 + regno - 33;
+    else switch (regno)
+    {
+    case  0: reg = CV_AMD64_RAX;    break;
+    case  1: reg = CV_AMD64_RDX;    break;
+    case  2: reg = CV_AMD64_RCX;    break;
+    case  3: reg = CV_AMD64_RBX;    break;
+    case  4: reg = CV_AMD64_RSI;    break;
+    case  5: reg = CV_AMD64_RDI;    break;
+    case  6: reg = CV_AMD64_RBP;    break;
+    case  7: reg = CV_AMD64_RSP;    break;
+    case  8: reg = CV_AMD64_R8;     break;
+    case  9: reg = CV_AMD64_R9;     break;
+    case 10: reg = CV_AMD64_R10;    break;
+    case 11: reg = CV_AMD64_R11;    break;
+    case 12: reg = CV_AMD64_R12;    break;
+    case 13: reg = CV_AMD64_R13;    break;
+    case 14: reg = CV_AMD64_R14;    break;
+    case 15: reg = CV_AMD64_R15;    break;
+    case 16: reg = CV_AMD64_RIP;    break;
+    case 49: reg = CV_AMD64_EFLAGS; break;
+    case 50: reg = CV_AMD64_ES;     break;
+    case 51: reg = CV_AMD64_CS;     break;
+    case 52: reg = CV_AMD64_SS;     break;
+    case 53: reg = CV_AMD64_DS;     break;
+    case 54: reg = CV_AMD64_FS;     break;
+    case 55: reg = CV_AMD64_GS;     break;
+    case 62: reg = CV_AMD64_TR;     break;
+    case 63: reg = CV_AMD64_LDTR;   break;
+    case 64: reg = CV_AMD64_MXCSR;  break;
+    case 65: reg = CV_AMD64_CTRL;   break;
+    case 66: reg = CV_AMD64_STAT;   break;
+/*
+ * 56-57 reserved
+ * 58 %fs.base
+ * 59 %gs.base
+ * 60-61 reserved
+ */
+    default:
+        FIXME("Don't know how to map register %d\n", regno);
+        return 0;
+    }
+    return reg;
+}
+
+
 struct cpu cpu_x86_64 = {
     IMAGE_FILE_MACHINE_AMD64,
     8,
     x86_64_get_addr,
     x86_64_stack_walk,
     x86_64_find_runtime_function,
+    x86_64_map_dwarf_register,
 };
diff --git a/dlls/dbghelp/dbghelp_private.h b/dlls/dbghelp/dbghelp_private.h
index 70fb1b08f8d..9f47b323225 100644
--- a/dlls/dbghelp/dbghelp_private.h
+++ b/dlls/dbghelp/dbghelp_private.h
@@ -478,6 +478,9 @@ struct cpu
 
     /* module manipulation */
     void*       (*find_runtime_function)(struct module*, DWORD64 addr);
+
+    /* dwarf dedicated information */
+    unsigned    (*map_dwarf_register)(unsigned regno);
 };
 
 extern struct cpu*      dbghelp_current_cpu;
diff --git a/dlls/dbghelp/dwarf.c b/dlls/dbghelp/dwarf.c
index 5513bedafa2..e3c9ed9d1be 100644
--- a/dlls/dbghelp/dwarf.c
+++ b/dlls/dbghelp/dwarf.c
@@ -629,49 +629,12 @@ static void dwarf2_load_one_entry(dwarf2_parse_context_t*, dwarf2_debug_info_t*,
 
 static unsigned dwarf2_map_register(int regno)
 {
-    unsigned    reg;
-
-    switch (regno)
+    if (regno == Wine_DW_no_register)
     {
-    case Wine_DW_no_register: FIXME("What the heck map reg 0x%x\n",regno); reg = 0; break;
-    case  0: reg = CV_REG_EAX; break;
-    case  1: reg = CV_REG_ECX; break;
-    case  2: reg = CV_REG_EDX; break;
-    case  3: reg = CV_REG_EBX; break;
-    case  4: reg = CV_REG_ESP; break;
-    case  5: reg = CV_REG_EBP; break;
-    case  6: reg = CV_REG_ESI; break;
-    case  7: reg = CV_REG_EDI; break;
-    case  8: reg = CV_REG_EIP; break;
-    case  9: reg = CV_REG_EFLAGS; break;
-    case 10: reg = CV_REG_CS;  break;
-    case 11: reg = CV_REG_SS;  break;
-    case 12: reg = CV_REG_DS;  break;
-    case 13: reg = CV_REG_ES;  break;
-    case 14: reg = CV_REG_FS;  break;
-    case 15: reg = CV_REG_GS;  break;
-    case 16: case 17: case 18: case 19:
-    case 20: case 21: case 22: case 23:
-        reg = CV_REG_ST0 + regno - 16; break;
-    case 24: reg = CV_REG_CTRL; break;
-    case 25: reg = CV_REG_STAT; break;
-    case 26: reg = CV_REG_TAG; break;
-/*
-reg: fiseg 27
-reg: fioff 28
-reg: foseg 29
-reg: fooff 30
-reg: fop   31
-*/
-    case 32: case 33: case 34: case 35:
-    case 36: case 37: case 38: case 39:
-        reg = CV_REG_XMM0 + regno - 32; break;
-    case 40: reg = CV_REG_MXCSR; break;
-    default:
-        FIXME("Don't know how to map register %d\n", regno);
+        FIXME("What the heck map reg 0x%x\n",regno);
         return 0;
     }
-    return reg;
+    return dbghelp_current_cpu->map_dwarf_register(regno);
 }
 
 static enum location_error
diff --git a/include/cvconst.h b/include/cvconst.h
index 86dd3f1ba16..1599a269822 100644
--- a/include/cvconst.h
+++ b/include/cvconst.h
@@ -511,6 +511,8 @@ enum CV_HREG_e
     CV_AMD64_MM70       = CV_REG_MM70,
     CV_AMD64_MM71       = CV_REG_MM71,
 
+    CV_AMD64_XMM8       = 252,           /* this includes XMM9 to XMM15 */
+
     CV_AMD64_RAX        = 328,
     CV_AMD64_RBX        = 329,
     CV_AMD64_RCX        = 330,