kernel32: Rewrite GetSystemInfo() purely on ntdll calls.
This commit is contained in:
Eric Pouech
Alexandre Julliard
parent
004fdc7a97
commit
e1e9f5993f
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@ -22,22 +22,6 @@
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#include "config.h"
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#include "wine/port.h"
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#ifdef HAVE_SYS_PARAM_H
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# include <sys/param.h>
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#endif
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#ifdef HAVE_SYS_SYSCTL_H
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# include <sys/sysctl.h>
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#endif
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#ifdef HAVE_MACHINE_CPU_H
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# include <machine/cpu.h>
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#endif
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#ifdef HAVE_MACH_MACHINE_H
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# include <mach/machine.h>
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#endif
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#include <ctype.h>
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#include <string.h>
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdlib.h>
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#ifdef HAVE_SYS_TIME_H
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@ -61,101 +45,6 @@ WINE_DEFAULT_DEBUG_CHANNEL(reg);
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#define SHARED_DATA ((KSHARED_USER_DATA*)0x7ffe0000)
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#define AUTH 0x68747541 /* "Auth" */
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#define ENTI 0x69746e65 /* "enti" */
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#define CAMD 0x444d4163 /* "cAMD" */
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/* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
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* We are compiled with -fPIC, so we can't clobber ebx.
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*/
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static inline void do_cpuid(unsigned int ax, unsigned int *p)
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{
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#ifdef __i386__
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__asm__("pushl %%ebx\n\t"
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"cpuid\n\t"
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"movl %%ebx, %%esi\n\t"
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"popl %%ebx"
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: "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
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: "0" (ax));
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#endif
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}
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/* From xf86info havecpuid.c 1.11 */
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static inline int have_cpuid(void)
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{
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#ifdef __i386__
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unsigned int f1, f2;
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__asm__("pushfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"movl %0,%1\n\t"
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"xorl %2,%0\n\t"
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"pushl %0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"popfl"
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: "=&r" (f1), "=&r" (f2)
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: "ir" (0x00200000));
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return ((f1^f2) & 0x00200000) != 0;
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#else
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return 0;
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#endif
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}
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static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
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static inline void get_cpuinfo( SYSTEM_INFO *info )
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{
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unsigned int regs[4], regs2[4];
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if (!have_cpuid()) return;
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do_cpuid(0x00000000, regs); /* get standard cpuid level and vendor name */
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if (regs[0]>=0x00000001) /* Check for supported cpuid version */
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{
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do_cpuid(0x00000001, regs2); /* get cpu features */
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switch ((regs2[0] >> 8) & 0xf) /* cpu family */
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{
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case 3:
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info->dwProcessorType = PROCESSOR_INTEL_386;
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info->wProcessorLevel = 3;
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break;
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case 4:
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info->dwProcessorType = PROCESSOR_INTEL_486;
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info->wProcessorLevel = 4;
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break;
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case 5:
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info->dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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info->wProcessorLevel = 5;
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break;
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case 6:
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case 15: /* PPro/2/3/4 has same info as P1 */
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info->dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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info->wProcessorLevel = 6;
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break;
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default:
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FIXME("unknown cpu family %d, please report! (-> setting to 386)\n",
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(regs2[0] >> 8)&0xf);
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break;
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}
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SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = !(regs2[3] & 1);
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SHARED_DATA->ProcessorFeatures[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
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SHARED_DATA->ProcessorFeatures[PF_COMPARE_EXCHANGE_DOUBLE] = (regs2[3] & (1 << 8 )) >> 8;
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SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = (regs2[3] & (1 << 23)) >> 23;
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if (regs[1] == AUTH &&
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regs[3] == ENTI &&
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regs[2] == CAMD) {
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do_cpuid(0x80000000, regs); /* get vendor cpuid level */
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if (regs[0]>=0x80000001) {
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do_cpuid(0x80000001, regs2); /* get vendor features */
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SHARED_DATA->ProcessorFeatures[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = (regs2[3] & (1 << 31 )) >> 31;
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}
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}
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}
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}
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/****************************************************************************
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* QueryPerformanceCounter (KERNEL32.@)
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*
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@ -213,444 +102,61 @@ BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
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* On the first call it creates cached values, so it doesn't have to determine
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* them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
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*
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* It creates a registry subhierarchy, looking like:
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* "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
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* Note that there is a hierarchy for every processor installed, so this
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* supports multiprocessor systems. This is done like Win95 does it, I think.
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*
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* It creates some registry entries in the environment part:
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* "\HKLM\System\CurrentControlSet\Control\Session Manager\Environment". These are
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* always present. When deleted, Windows will add them again.
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*
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* It also creates a cached flag array for IsProcessorFeaturePresent().
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*/
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VOID WINAPI GetSystemInfo(
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LPSYSTEM_INFO si /* [out] Destination for system information, may not be NULL */)
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{
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static int cache = 0;
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static SYSTEM_INFO cachedsi;
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SYSTEM_BASIC_INFORMATION sbi;
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NTSTATUS nts;
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SYSTEM_BASIC_INFORMATION sbi;
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SYSTEM_CPU_INFORMATION sci;
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TRACE("si=0x%p\n", si);
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if (cache) {
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*si = cachedsi;
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return;
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}
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memset(SHARED_DATA->ProcessorFeatures,0,sizeof(SHARED_DATA->ProcessorFeatures));
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TRACE("si=0x%p\n", si);
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NtQuerySystemInformation( SystemBasicInformation, &sbi, sizeof(sbi), NULL );
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cachedsi.dwPageSize = sbi.PageSize;
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cachedsi.lpMinimumApplicationAddress = sbi.LowestUserAddress;
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cachedsi.lpMaximumApplicationAddress = sbi.HighestUserAddress;
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cachedsi.dwNumberOfProcessors = sbi.NumberOfProcessors;
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cachedsi.dwAllocationGranularity = sbi.AllocationGranularity;
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if ((nts = NtQuerySystemInformation( SystemBasicInformation, &sbi, sizeof(sbi), NULL )) != STATUS_SUCCESS ||
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(nts = NtQuerySystemInformation( SystemCpuInformation, &sci, sizeof(sci), NULL )) != STATUS_SUCCESS)
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{
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SetLastError(RtlNtStatusToDosError(nts));
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return;
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}
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/* choose sensible defaults ...
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* FIXME: perhaps overridable with precompiler flags?
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*/
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cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
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cachedsi.dwActiveProcessorMask = 0;
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cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel = 5; /* 586 */
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cachedsi.wProcessorRevision = 0;
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si->u.s.wProcessorArchitecture = sci.Architecture;
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si->u.s.wReserved = 0;
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si->dwPageSize = sbi.PageSize;
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si->lpMinimumApplicationAddress = sbi.LowestUserAddress;
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si->lpMaximumApplicationAddress = sbi.HighestUserAddress;
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si->dwActiveProcessorMask = sbi.ActiveProcessorsAffinityMask;
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si->dwNumberOfProcessors = sbi.NumberOfProcessors;
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cache = 1; /* even if there is no more info, we now have a cache entry */
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*si = cachedsi;
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/* Hmm, reasonable processor feature defaults? */
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#ifdef linux
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{
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char line[200];
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FILE *f = fopen ("/proc/cpuinfo", "r");
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if (!f)
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return;
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while (fgets(line,200,f)!=NULL) {
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char *s,*value;
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/* NOTE: the ':' is the only character we can rely on */
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if (!(value = strchr(line,':')))
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continue;
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/* terminate the valuename */
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s = value - 1;
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while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
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*(s + 1) = '\0';
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/* and strip leading spaces from value */
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value += 1;
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while (*value==' ') value++;
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if ((s=strchr(value,'\n')))
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*s='\0';
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if (!strcasecmp(line,"processor")) {
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/* processor number counts up... */
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unsigned int x;
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if (sscanf(value,"%d",&x))
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if (x+1>cachedsi.dwNumberOfProcessors)
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cachedsi.dwNumberOfProcessors=x+1;
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continue;
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}
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if (!strcasecmp(line,"model")) {
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/* First part of wProcessorRevision */
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int x;
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if (sscanf(value,"%d",&x))
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cachedsi.wProcessorRevision = cachedsi.wProcessorRevision | (x << 8);
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continue;
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}
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/* 2.1 method */
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if (!strcasecmp(line, "cpu family")) {
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if (isdigit (value[0])) {
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switch (value[0] - '0') {
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case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
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cachedsi.wProcessorLevel= 3;
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break;
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case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
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cachedsi.wProcessorLevel= 4;
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break;
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case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel= 5;
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break;
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default:
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cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel = atoi(value);
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break;
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}
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}
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continue;
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}
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/* old 2.0 method */
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if (!strcasecmp(line, "cpu")) {
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if ( isdigit (value[0]) && value[1] == '8' &&
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value[2] == '6' && value[3] == 0
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) {
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switch (value[0] - '0') {
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case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
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cachedsi.wProcessorLevel= 3;
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break;
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case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
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cachedsi.wProcessorLevel= 4;
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break;
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case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel= 5;
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break;
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case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel= 6;
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break;
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default:
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FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
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break;
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}
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}
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continue;
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}
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if (!strcasecmp(line,"stepping")) {
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/* Second part of wProcessorRevision */
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int x;
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if (sscanf(value,"%d",&x))
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cachedsi.wProcessorRevision = cachedsi.wProcessorRevision | x;
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continue;
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}
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if (!strcasecmp(line, "cpu MHz")) {
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double cmz;
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if (sscanf( value, "%lf", &cmz ) == 1) {
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/* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
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cpuHz = cmz * 1000 * 1000;
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}
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continue;
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}
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if (!strcasecmp(line,"fdiv_bug")) {
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if (!strncasecmp(value,"yes",3))
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SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
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continue;
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}
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if (!strcasecmp(line,"fpu")) {
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if (!strncasecmp(value,"no",2))
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SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = TRUE;
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continue;
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}
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if ( !strcasecmp(line,"flags") ||
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!strcasecmp(line,"features")) {
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if (strstr(value,"cx8"))
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SHARED_DATA->ProcessorFeatures[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
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if (strstr(value,"mmx"))
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SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
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if (strstr(value,"tsc"))
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SHARED_DATA->ProcessorFeatures[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
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if (strstr(value,"3dnow"))
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SHARED_DATA->ProcessorFeatures[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
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/* This will also catch sse2, but we have sse itself
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* if we have sse2, so no problem */
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if (strstr(value,"sse"))
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SHARED_DATA->ProcessorFeatures[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
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if (strstr(value,"sse2"))
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SHARED_DATA->ProcessorFeatures[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
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if (strstr(value,"pae"))
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SHARED_DATA->ProcessorFeatures[PF_PAE_ENABLED] = TRUE;
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continue;
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}
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}
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fclose (f);
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}
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#elif defined (__NetBSD__)
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switch (sci.Architecture)
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{
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case PROCESSOR_ARCHITECTURE_INTEL:
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switch (sci.Level)
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{
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int mib[2];
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int value;
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size_t val_len;
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char model[256];
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char *cpuclass;
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FILE *f = fopen ("/var/run/dmesg.boot", "r");
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/* first deduce as much as possible from the sysctls */
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mib[0] = CTL_MACHDEP;
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#ifdef CPU_FPU_PRESENT
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mib[1] = CPU_FPU_PRESENT;
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val_len = sizeof(value);
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if (sysctl(mib, 2, &value, &val_len, NULL, 0) >= 0)
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SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = !value;
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#endif
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#ifdef CPU_SSE
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mib[1] = CPU_SSE; /* this should imply MMX */
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val_len = sizeof(value);
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if (sysctl(mib, 2, &value, &val_len, NULL, 0) >= 0)
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if (value) SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
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#endif
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#ifdef CPU_SSE2
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mib[1] = CPU_SSE2; /* this should imply MMX */
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val_len = sizeof(value);
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if (sysctl(mib, 2, &value, &val_len, NULL, 0) >= 0)
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if (value) SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
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#endif
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mib[0] = CTL_HW;
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mib[1] = HW_NCPU;
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val_len = sizeof(value);
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if (sysctl(mib, 2, &value, &val_len, NULL, 0) >= 0)
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if (value > cachedsi.dwNumberOfProcessors)
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cachedsi.dwNumberOfProcessors = value;
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mib[1] = HW_MODEL;
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val_len = sizeof(model)-1;
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if (sysctl(mib, 2, model, &val_len, NULL, 0) >= 0) {
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model[val_len] = '\0'; /* just in case */
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cpuclass = strstr(model, "-class");
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if (cpuclass != NULL) {
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while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
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if (!strncmp(cpuclass+1, "386", 3)) {
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cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
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cachedsi.wProcessorLevel= 3;
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}
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if (!strncmp(cpuclass+1, "486", 3)) {
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cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
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cachedsi.wProcessorLevel= 4;
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}
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if (!strncmp(cpuclass+1, "586", 3)) {
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cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel= 5;
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}
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if (!strncmp(cpuclass+1, "686", 3)) {
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cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel= 6;
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/* this should imply MMX */
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SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
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}
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}
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}
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/* it may be worth reading from /var/run/dmesg.boot for
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additional information such as CX8, MMX and TSC
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(however this information should be considered less
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reliable than that from the sysctl calls) */
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if (f != NULL)
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{
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while (fgets(model, 255, f) != NULL) {
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int cpu, features;
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if (sscanf(model,"cpu%d: features %x<", &cpu, &features) == 2) {
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/* we could scan the string but it is easier
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to test the bits directly */
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if (features & 0x1)
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SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = TRUE;
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if (features & 0x10)
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SHARED_DATA->ProcessorFeatures[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
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if (features & 0x100)
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SHARED_DATA->ProcessorFeatures[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
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if (features & 0x800000)
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SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
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break;
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}
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}
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fclose(f);
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}
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case 3: si->dwProcessorType = PROCESSOR_INTEL_386; break;
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case 4: si->dwProcessorType = PROCESSOR_INTEL_486; break;
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case 5:
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case 6: si->dwProcessorType = PROCESSOR_INTEL_PENTIUM; break;
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default: si->dwProcessorType = PROCESSOR_INTEL_PENTIUM; break;
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||||
}
|
||||
#elif defined(__FreeBSD__)
|
||||
{
|
||||
int ret, num;
|
||||
size_t len;
|
||||
|
||||
get_cpuinfo( &cachedsi );
|
||||
|
||||
/* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
|
||||
/*len = sizeof(num);
|
||||
ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
|
||||
if (!ret)
|
||||
SHARED_DATA->ProcessorFeatures[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
|
||||
|
||||
len = sizeof(num);
|
||||
ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
|
||||
if (!ret)
|
||||
cachedsi.dwNumberOfProcessors = num;
|
||||
}
|
||||
#elif defined(__sun)
|
||||
{
|
||||
int num = sysconf( _SC_NPROCESSORS_ONLN );
|
||||
|
||||
if (num == -1) num = 1;
|
||||
get_cpuinfo( &cachedsi );
|
||||
cachedsi.dwNumberOfProcessors = num;
|
||||
}
|
||||
#elif defined (__APPLE__)
|
||||
{
|
||||
size_t valSize;
|
||||
unsigned long long longVal;
|
||||
int value;
|
||||
int cputype;
|
||||
char buffer[256];
|
||||
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
|
||||
{
|
||||
if (value)
|
||||
SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = FALSE;
|
||||
else
|
||||
SHARED_DATA->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = TRUE;
|
||||
}
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
|
||||
cachedsi.dwNumberOfProcessors = value;
|
||||
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
|
||||
cachedsi.dwActiveProcessorMask = ((ULONG_PTR)1 << value) - 1;
|
||||
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
|
||||
{
|
||||
switch (cputype)
|
||||
{
|
||||
case CPU_TYPE_POWERPC:
|
||||
cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
|
||||
{
|
||||
switch (value)
|
||||
{
|
||||
case CPU_SUBTYPE_POWERPC_601:
|
||||
case CPU_SUBTYPE_POWERPC_602:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_601;
|
||||
cachedsi.wProcessorLevel = 1;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_603:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_603;
|
||||
cachedsi.wProcessorLevel = 3;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_603e:
|
||||
case CPU_SUBTYPE_POWERPC_603ev:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_603;
|
||||
cachedsi.wProcessorLevel = 6;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_604:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_604;
|
||||
cachedsi.wProcessorLevel = 4;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_604e:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_604;
|
||||
cachedsi.wProcessorLevel = 9;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_620:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_620;
|
||||
cachedsi.wProcessorLevel = 20;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_750:
|
||||
case CPU_SUBTYPE_POWERPC_7400:
|
||||
case CPU_SUBTYPE_POWERPC_7450:
|
||||
/* G3/G4 derive from 603 so ... */
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_603;
|
||||
cachedsi.wProcessorLevel = 6;
|
||||
break;
|
||||
case CPU_SUBTYPE_POWERPC_970:
|
||||
cachedsi.dwProcessorType = PROCESSOR_PPC_604;
|
||||
cachedsi.wProcessorLevel = 9;
|
||||
/* :o) SHARED_DATA->ProcessorFeatures[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
break; /* CPU_TYPE_POWERPC */
|
||||
case CPU_TYPE_I386:
|
||||
cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("machdep.cpu.family", &value, &valSize, NULL, 0) == 0)
|
||||
{
|
||||
cachedsi.wProcessorLevel = value;
|
||||
switch (value)
|
||||
{
|
||||
case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386; break;
|
||||
case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486; break;
|
||||
default: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM; break;
|
||||
}
|
||||
}
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("machdep.cpu.model", &value, &valSize, NULL, 0) == 0)
|
||||
cachedsi.wProcessorRevision = (value << 8);
|
||||
valSize = sizeof(int);
|
||||
if (sysctlbyname ("machdep.cpu.stepping", &value, &valSize, NULL, 0) == 0)
|
||||
cachedsi.wProcessorRevision |= value;
|
||||
valSize = sizeof(buffer);
|
||||
if (sysctlbyname ("machdep.cpu.features", buffer, &valSize, NULL, 0) == 0)
|
||||
{
|
||||
cachedsi.wProcessorRevision |= value;
|
||||
if (strstr(buffer,"CX8")) SHARED_DATA->ProcessorFeatures[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
|
||||
if (strstr(buffer,"MMX")) SHARED_DATA->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
if (strstr(buffer,"TSC")) SHARED_DATA->ProcessorFeatures[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
|
||||
if (strstr(buffer,"3DNOW")) SHARED_DATA->ProcessorFeatures[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
if (strstr(buffer,"SSE")) SHARED_DATA->ProcessorFeatures[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
if (strstr(buffer,"SSE2")) SHARED_DATA->ProcessorFeatures[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
if (strstr(buffer,"PAE")) SHARED_DATA->ProcessorFeatures[PF_PAE_ENABLED] = TRUE;
|
||||
}
|
||||
break; /* CPU_TYPE_I386 */
|
||||
default: break;
|
||||
} /* switch (cputype) */
|
||||
}
|
||||
valSize = sizeof(longVal);
|
||||
if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
|
||||
cpuHz = longVal;
|
||||
}
|
||||
#else
|
||||
FIXME("not yet supported on this system\n");
|
||||
#endif
|
||||
if (!cachedsi.dwActiveProcessorMask)
|
||||
cachedsi.dwActiveProcessorMask = ((ULONG_PTR)1 << cachedsi.dwNumberOfProcessors) - 1;
|
||||
|
||||
*si = cachedsi;
|
||||
|
||||
TRACE("<- CPU arch %d, res'd %d, pagesize %d, minappaddr %p, maxappaddr %p,"
|
||||
" act.cpumask %lx, numcpus %d, CPU type %d, allocgran. %d, CPU level %d, CPU rev %d\n",
|
||||
si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
|
||||
si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
|
||||
si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
|
||||
si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
|
||||
break;
|
||||
case PROCESSOR_ARCHITECTURE_PPC:
|
||||
switch (sci.Level)
|
||||
{
|
||||
case 1: si->dwProcessorType = PROCESSOR_PPC_601; break;
|
||||
case 3:
|
||||
case 6: si->dwProcessorType = PROCESSOR_PPC_603; break;
|
||||
case 4: si->dwProcessorType = PROCESSOR_PPC_604; break;
|
||||
case 9: si->dwProcessorType = PROCESSOR_PPC_604; break;
|
||||
case 20: si->dwProcessorType = PROCESSOR_PPC_620; break;
|
||||
default: si->dwProcessorType = 0;
|
||||
}
|
||||
break;
|
||||
default: FIXME("Unknown processor architecture %x\n", sci.Architecture);
|
||||
}
|
||||
si->dwAllocationGranularity = sbi.AllocationGranularity;
|
||||
si->wProcessorLevel = sci.Level;
|
||||
si->wProcessorRevision = sci.Revision;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -681,9 +187,6 @@ VOID WINAPI GetNativeSystemInfo(
|
|||
BOOL WINAPI IsProcessorFeaturePresent (
|
||||
DWORD feature /* [in] Feature number, (PF_ constants from "winnt.h") */)
|
||||
{
|
||||
SYSTEM_INFO si;
|
||||
GetSystemInfo (&si); /* To ensure the information is loaded and cached */
|
||||
|
||||
if (feature < 64)
|
||||
return SHARED_DATA->ProcessorFeatures[feature];
|
||||
else
|
||||
|
|
|
|||
Loading…
Reference in New Issue