Added CPU detection for FreeBSD.
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c862085b90
commit
cd46d71ebd
101
misc/cpu.c
101
misc/cpu.c
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@ -35,6 +35,7 @@
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#include <ctype.h>
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#define NONAMELESSUNION
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#define NONAMELESSSTRUCT
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@ -47,6 +48,48 @@
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WINE_DEFAULT_DEBUG_CHANNEL(reg);
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#define AUTH 0x68747541 /* "Auth" */
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#define ENTI 0x69746e65 /* "enti" */
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#define CAMD 0x444d4163 /* "cAMD" */
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/* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
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* We are compiled with -fPIC, so we can't clobber ebx.
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*/
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static inline void do_cpuid(int ax, int *p)
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{
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#ifdef __i386__
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__asm__("pushl %%ebx\n\t"
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"cpuid\n\t"
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"movl %%ebx, %%esi\n\t"
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"popl %%ebx"
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: "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
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: "0" (ax));
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#endif
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}
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/* From xf86info havecpuid.c 1.11 */
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static inline int have_cpuid(void)
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{
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#ifdef __i386__
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unsigned int f1, f2;
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__asm__("pushfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"movl %0,%1\n\t"
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"xorl %2,%0\n\t"
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"pushl %0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"popfl"
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: "=&r" (f1), "=&r" (f2)
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: "ir" (0x00200000));
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return ((f1^f2) & 0x00200000) != 0;
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#else
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return 0;
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#endif
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}
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static BYTE PF[64] = {0,};
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static void create_registry_keys( const SYSTEM_INFO *info )
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@ -368,9 +411,63 @@ VOID WINAPI GetSystemInfo(
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}
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memcpy(si,&cachedsi,sizeof(*si));
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#else /* !linux && !__NetBSD__ */
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#elif defined(__FreeBSD__)
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{
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unsigned int regs[4], regs2[4];
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int ret, len, num;
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if (!have_cpuid())
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regs[0] = 0; /* No cpuid support -- skip the rest */
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else
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do_cpuid(0x00000000, regs); /* get standard cpuid level and vendor name */
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if (regs[0]>=0x00000001) { /* Check for supported cpuid version */
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do_cpuid(0x00000001, regs2); /* get cpu features */
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switch ((regs2[0] >> 8)&0xf) { /* cpu family */
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case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
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cachedsi.wProcessorLevel = 3;
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break;
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case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
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cachedsi.wProcessorLevel = 4;
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break;
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case 5:
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case 6: /* PPro/2/3 has same info as P1 */
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cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
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cachedsi.wProcessorLevel = 5;
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break;
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default:
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FIXME("unknown cpu family %d, please report! (-> setting to 386)\n", \
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(regs2[0] >> 8)&0xf);
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break;
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}
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PF[PF_FLOATING_POINT_EMULATED] = !(regs2[3] & 1);
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PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
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PF[PF_COMPARE_EXCHANGE_DOUBLE] = (regs2[3] & (1 << 8 )) >> 8;
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PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = (regs2[3] & (1 << 23)) >> 23;
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/* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
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/*len = sizeof(num);
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ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
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if (!ret)
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PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
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if (regs[1] == AUTH &&
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regs[3] == ENTI &&
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regs[2] == CAMD) {
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do_cpuid(0x80000000, regs); /* get vendor cpuid level */
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if (regs[0]>=0x80000001) {
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do_cpuid(0x80000001, regs2); /* get vendor features */
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PF[PF_AMD3D_INSTRUCTIONS_AVAILABLE] =
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(regs2[3] & (1 << 31 )) >> 31;
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}
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}
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}
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len = sizeof(num);
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ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
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if (!ret)
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cachedsi.dwNumberOfProcessors = num;
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}
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memcpy(si,&cachedsi,sizeof(*si));
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#else
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FIXME("not yet supported on this system\n");
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#endif /* !linux && !__NetBSD__ */
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#endif
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TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
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" act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
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si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
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