wined3d: Implement WINED3DSI_TEXLD_BIAS in arb.

This commit is contained in:
Stefan Dösinger 2007-09-05 16:18:54 +02:00 committed by Alexandre Julliard
parent 9531a10897
commit c2c7b1df91
1 changed files with 21 additions and 13 deletions

View File

@ -486,7 +486,7 @@ static void vshader_program_add_param(SHADER_OPCODE_ARG *arg, const DWORD param,
}
}
static void shader_hw_sample(SHADER_OPCODE_ARG* arg, DWORD sampler_idx, const char *dst_str, const char *coord_reg, BOOL projected) {
static void shader_hw_sample(SHADER_OPCODE_ARG* arg, DWORD sampler_idx, const char *dst_str, const char *coord_reg, BOOL projected, BOOL bias) {
SHADER_BUFFER* buffer = arg->buffer;
DWORD sampler_type = arg->reg_maps->samplers[sampler_idx] & WINED3DSP_TEXTURETYPE_MASK;
const char *tex_type;
@ -513,7 +513,12 @@ static void shader_hw_sample(SHADER_OPCODE_ARG* arg, DWORD sampler_idx, const ch
tex_type = "";
}
if (projected) {
if (bias) {
/* Shouldn't be possible, but let's check for it */
if(projected) FIXME("Biased and Projected texture sampling\n");
/* TXB takes the 4th component of the source vector automatically, as d3d. Nothing more to do */
shader_addline(buffer, "TXB %s, %s, texture[%u], %s;\n", dst_str, coord_reg, sampler_idx, tex_type);
} else if (projected) {
shader_addline(buffer, "TXP %s, %s, texture[%u], %s;\n", dst_str, coord_reg, sampler_idx, tex_type);
} else {
shader_addline(buffer, "TEX %s, %s, texture[%u], %s;\n", dst_str, coord_reg, sampler_idx, tex_type);
@ -965,7 +970,7 @@ void pshader_hw_tex(SHADER_OPCODE_ARG* arg) {
DWORD* src = arg->src;
SHADER_BUFFER* buffer = arg->buffer;
DWORD hex_version = This->baseShader.hex_version;
BOOL projected = FALSE;
BOOL projected = FALSE, bias = FALSE;
char reg_dest[40];
char reg_coord[40];
@ -1014,8 +1019,11 @@ void pshader_hw_tex(SHADER_OPCODE_ARG* arg) {
if(arg->opcode_token & WINED3DSI_TEXLD_PROJECT) {
projected = TRUE;
}
if(arg->opcode_token & WINED3DSI_TEXLD_BIAS) {
bias = TRUE;
}
}
shader_hw_sample(arg, reg_sampler_code, reg_dest, reg_coord, projected);
shader_hw_sample(arg, reg_sampler_code, reg_dest, reg_coord, projected, bias);
}
void pshader_hw_texcoord(SHADER_OPCODE_ARG* arg) {
@ -1054,7 +1062,7 @@ void pshader_hw_texreg2ar(SHADER_OPCODE_ARG* arg) {
shader_addline(buffer, "MOV TMP.r, T%u.a;\n", reg2);
shader_addline(buffer, "MOV TMP.g, T%u.r;\n", reg2);
flags = reg1 < MAX_TEXTURES ? deviceImpl->stateBlock->textureState[reg1][WINED3DTSS_TEXTURETRANSFORMFLAGS] : 0;
shader_hw_sample(arg, reg1, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED);
shader_hw_sample(arg, reg1, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED, FALSE);
}
void pshader_hw_texreg2gb(SHADER_OPCODE_ARG* arg) {
@ -1072,7 +1080,7 @@ void pshader_hw_texreg2gb(SHADER_OPCODE_ARG* arg) {
shader_addline(buffer, "MOV TMP.r, T%u.g;\n", reg2);
shader_addline(buffer, "MOV TMP.g, T%u.b;\n", reg2);
flags = reg1 < MAX_TEXTURES ? deviceImpl->stateBlock->textureState[reg1][WINED3DTSS_TEXTURETRANSFORMFLAGS] : 0;
shader_hw_sample(arg, reg1, dst_str, "TMP", FALSE);
shader_hw_sample(arg, reg1, dst_str, "TMP", FALSE, FALSE);
}
void pshader_hw_texbem(SHADER_OPCODE_ARG* arg) {
@ -1110,7 +1118,7 @@ void pshader_hw_texbem(SHADER_OPCODE_ARG* arg) {
shader_addline(buffer, "ADD TMP.rg, TMP, %s;\n", reg_coord);
}
shader_hw_sample(arg, reg_dest_code, reg_coord, "TMP", FALSE);
shader_hw_sample(arg, reg_dest_code, reg_coord, "TMP", FALSE, FALSE);
} else {
DWORD tf;
if(reg_dest_code < MAX_TEXTURES) {
@ -1119,7 +1127,7 @@ void pshader_hw_texbem(SHADER_OPCODE_ARG* arg) {
tf = 0;
}
/* Without a bump matrix loaded, just sample with the unmodified coordinates */
shader_hw_sample(arg, reg_dest_code, reg_coord, reg_coord, tf & WINED3DTTFF_PROJECTED);
shader_hw_sample(arg, reg_dest_code, reg_coord, reg_coord, tf & WINED3DTTFF_PROJECTED, FALSE);
}
}
@ -1147,7 +1155,7 @@ void pshader_hw_texm3x2tex(SHADER_OPCODE_ARG* arg) {
pshader_gen_input_modifier_line(buffer, arg->src[0], 0, src0_name);
shader_addline(buffer, "DP3 TMP.y, T%u, %s;\n", reg, src0_name);
flags = reg < MAX_TEXTURES ? deviceImpl->stateBlock->textureState[reg][WINED3DTSS_TEXTURETRANSFORMFLAGS] : 0;
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED);
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED, FALSE);
}
void pshader_hw_texm3x3pad(SHADER_OPCODE_ARG* arg) {
@ -1180,7 +1188,7 @@ void pshader_hw_texm3x3tex(SHADER_OPCODE_ARG* arg) {
/* Sample the texture using the calculated coordinates */
sprintf(dst_str, "T%u", reg);
flags = reg < MAX_TEXTURES ? deviceImpl->stateBlock->textureState[reg][WINED3DTSS_TEXTURETRANSFORMFLAGS] : 0;
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED);
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED, FALSE);
current_state->current_row = 0;
}
@ -1216,7 +1224,7 @@ void pshader_hw_texm3x3vspec(SHADER_OPCODE_ARG* arg) {
/* Sample the texture using the calculated coordinates */
sprintf(dst_str, "T%u", reg);
flags = reg < MAX_TEXTURES ? deviceImpl->stateBlock->textureState[reg][WINED3DTSS_TEXTURETRANSFORMFLAGS] : 0;
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED);
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED, FALSE);
current_state->current_row = 0;
}
@ -1253,7 +1261,7 @@ void pshader_hw_texm3x3spec(SHADER_OPCODE_ARG* arg) {
/* Sample the texture using the calculated coordinates */
sprintf(dst_str, "T%u", reg);
flags = reg < MAX_TEXTURES ? deviceImpl->stateBlock->textureState[reg][WINED3DTSS_TEXTURETRANSFORMFLAGS] : 0;
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED);
shader_hw_sample(arg, reg, dst_str, "TMP", flags & WINED3DTTFF_PROJECTED, FALSE);
current_state->current_row = 0;
}
@ -1297,7 +1305,7 @@ void pshader_hw_texdp3tex(SHADER_OPCODE_ARG* arg) {
shader_addline(buffer, "DP3 TMP.x, T%u, %s;\n", sampler_idx, src0);
sprintf(dst_str, "T%u", sampler_idx);
shader_hw_sample(arg, sampler_idx, dst_str, "TMP", FALSE /* Only one coord, can't be projected */);
shader_hw_sample(arg, sampler_idx, dst_str, "TMP", FALSE /* Only one coord, can't be projected */, FALSE);
}
/** Process the WINED3DSIO_TEXDP3 instruction in ARB: