wined3d: Fix SM4 pixel shader output registers mapping.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -266,11 +266,7 @@ struct wined3d_sm4_data
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struct wined3d_shader_version shader_version;
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const DWORD *end;
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struct
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{
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enum wined3d_shader_register_type register_type;
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UINT register_idx;
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} output_map[MAX_REG_OUTPUT];
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unsigned int output_map[MAX_REG_OUTPUT];
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struct wined3d_shader_src_param src_param[5];
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struct wined3d_shader_dst_param dst_param[2];
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@ -287,13 +283,6 @@ struct wined3d_sm4_opcode_info
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const char *src_info;
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};
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struct sysval_map
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{
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enum wined3d_sysval_semantic sysval;
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enum wined3d_shader_register_type register_type;
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UINT register_idx;
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};
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/*
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* F -> WINED3D_DATA_FLOAT
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* I -> WINED3D_DATA_INT
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@ -429,19 +418,6 @@ static const enum wined3d_primitive_type input_primitive_type_table[] =
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/* WINED3D_SM4_INPUT_PT_TRIANGLEADJ */ WINED3D_PT_TRIANGLELIST_ADJ,
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};
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static const struct sysval_map sysval_map[] =
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{
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{WINED3D_SV_DEPTH, WINED3DSPR_DEPTHOUT, 0},
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{WINED3D_SV_TARGET0, WINED3DSPR_COLOROUT, 0},
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{WINED3D_SV_TARGET1, WINED3DSPR_COLOROUT, 1},
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{WINED3D_SV_TARGET2, WINED3DSPR_COLOROUT, 2},
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{WINED3D_SV_TARGET3, WINED3DSPR_COLOROUT, 3},
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{WINED3D_SV_TARGET4, WINED3DSPR_COLOROUT, 4},
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{WINED3D_SV_TARGET5, WINED3DSPR_COLOROUT, 5},
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{WINED3D_SV_TARGET6, WINED3DSPR_COLOROUT, 6},
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{WINED3D_SV_TARGET7, WINED3DSPR_COLOROUT, 7},
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};
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static const enum wined3d_shader_resource_type resource_type_table[] =
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{
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/* 0 */ WINED3D_SHADER_RESOURCE_NONE,
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@ -496,8 +472,8 @@ static void map_register(const struct wined3d_sm4_data *priv, struct wined3d_sha
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break;
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}
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reg->type = priv->output_map[reg_idx].register_type;
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reg->idx[0].offset = priv->output_map[reg_idx].register_idx;
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reg->type = WINED3DSPR_COLOROUT;
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reg->idx[0].offset = priv->output_map[reg_idx];
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}
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break;
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@ -529,7 +505,7 @@ static enum wined3d_data_type map_data_type(char t)
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static void *shader_sm4_init(const DWORD *byte_code, const struct wined3d_shader_signature *output_signature)
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{
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struct wined3d_sm4_data *priv;
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unsigned int i, j;
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unsigned int i;
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if (!(priv = HeapAlloc(GetProcessHeap(), 0, sizeof(*priv))))
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{
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@ -548,15 +524,7 @@ static void *shader_sm4_init(const DWORD *byte_code, const struct wined3d_shader
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continue;
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}
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for (j = 0; j < ARRAY_SIZE(sysval_map); ++j)
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{
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if (e->sysval_semantic == sysval_map[j].sysval)
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{
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priv->output_map[e->register_idx].register_type = sysval_map[j].register_type;
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priv->output_map[e->register_idx].register_idx = sysval_map[j].register_idx;
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break;
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}
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}
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priv->output_map[e->register_idx] = e->semantic_idx;
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}
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list_init(&priv->src_free);
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@ -752,16 +752,6 @@ enum wined3d_sysval_semantic
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WINED3D_SV_INSTANCEID = 8,
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WINED3D_SV_ISFRONTFACE = 9,
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WINED3D_SV_SAMPLEINDEX = 10,
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WINED3D_SV_DEPTH = 0xffffffff,
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WINED3D_SV_TARGET0 = 0,
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WINED3D_SV_TARGET1 = 1,
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WINED3D_SV_TARGET2 = 2,
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WINED3D_SV_TARGET3 = 3,
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WINED3D_SV_TARGET4 = 4,
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WINED3D_SV_TARGET5 = 5,
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WINED3D_SV_TARGET6 = 6,
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WINED3D_SV_TARGET7 = 7,
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};
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enum wined3d_scanline_ordering
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