ntoskrnl: Emulate 'mov Eb, Gb' instruction on x86 processor architecture.
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@ -59,7 +59,7 @@ static inline struct idtr get_idtr(void)
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}
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/* store an operand into a register */
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static void store_reg( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int long_op )
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static void store_reg_word( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int long_op )
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{
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switch((regmodrm >> 3) & 7)
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{
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@ -98,6 +98,22 @@ static void store_reg( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int lo
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}
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}
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/* store an operand into a byte register */
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static void store_reg_byte( CONTEXT *context, BYTE regmodrm, const BYTE *addr )
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{
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switch((regmodrm >> 3) & 7)
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{
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case 0: context->Eax = (context->Eax & 0xffffff00) | *addr; break;
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case 1: context->Ecx = (context->Ecx & 0xffffff00) | *addr; break;
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case 2: context->Edx = (context->Edx & 0xffffff00) | *addr; break;
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case 3: context->Ebx = (context->Ebx & 0xffffff00) | *addr; break;
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case 4: context->Eax = (context->Eax & 0xffff00ff) | (*addr << 8); break;
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case 5: context->Ecx = (context->Ecx & 0xffff00ff) | (*addr << 8); break;
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case 6: context->Edx = (context->Edx & 0xffff00ff) | (*addr << 8); break;
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case 7: context->Ebx = (context->Ebx & 0xffff00ff) | (*addr << 8); break;
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}
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}
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/***********************************************************************
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* INSTR_GetOperandAddr
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*
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@ -404,19 +420,26 @@ static DWORD emulate_instruction( EXCEPTION_RECORD *rec, CONTEXT *context )
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}
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break; /* Unable to emulate it */
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case 0x8a: /* mov Eb, Gb */
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case 0x8b: /* mov Ev, Gv */
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{
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BYTE *addr = INSTR_GetOperandAddr(context, instr + 1, long_addr,
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BYTE *data = INSTR_GetOperandAddr(context, instr + 1, long_addr,
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segprefix, &len);
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unsigned int data_size = (*instr == 0x8b) ? (long_op ? 4 : 2) : 1;
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struct idtr idtr = get_idtr();
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unsigned int offset = addr - idtr.base;
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unsigned int offset = data - idtr.base;
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if (offset <= idtr.limit + 1 - (long_op ? 4 : 2))
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if (offset <= idtr.limit + 1 - data_size)
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{
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idt[1].LimitLow = 0x100; /* FIXME */
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idt[2].LimitLow = 0x11E; /* FIXME */
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idt[3].LimitLow = 0x500; /* FIXME */
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store_reg( context, instr[1], (BYTE *)idt + offset, long_op );
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switch (*instr)
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{
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case 0x8a: store_reg_byte( context, instr[1], (BYTE *)idt + offset ); break;
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case 0x8b: store_reg_word( context, instr[1], (BYTE *)idt + offset, long_op ); break;
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}
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context->Eip += prefixlen + len + 1;
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return ExceptionContinueExecution;
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}
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