winedbg: Verify context flags before reading or writing registers.
This commit is contained in:
Akihiro Sagawa
Alexandre Julliard
parent
8f8363ede6
commit
b2de0880ec
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@ -208,134 +208,135 @@ struct cpu_register
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size_t ctx_offset;
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size_t ctx_offset;
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size_t ctx_length;
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size_t ctx_length;
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size_t gdb_length;
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size_t gdb_length;
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ULONG ctx_flags;
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};
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};
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#define REG(r,gs) {FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs}
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#define REG(r,gs,m) {FIELD_OFFSET(CONTEXT, r), sizeof(((CONTEXT*)NULL)->r), gs, m}
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#ifdef __i386__
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#ifdef __i386__
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static const char target_xml[] = "";
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static const char target_xml[] = "";
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static struct cpu_register cpu_register_map[] = {
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static struct cpu_register cpu_register_map[] = {
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REG(Eax, 4),
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REG(Eax, 4, CONTEXT_INTEGER),
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REG(Ecx, 4),
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REG(Ecx, 4, CONTEXT_INTEGER),
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REG(Edx, 4),
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REG(Edx, 4, CONTEXT_INTEGER),
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REG(Ebx, 4),
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REG(Ebx, 4, CONTEXT_INTEGER),
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REG(Esp, 4),
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REG(Esp, 4, CONTEXT_CONTROL),
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REG(Ebp, 4),
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REG(Ebp, 4, CONTEXT_CONTROL),
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REG(Esi, 4),
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REG(Esi, 4, CONTEXT_INTEGER),
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REG(Edi, 4),
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REG(Edi, 4, CONTEXT_INTEGER),
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REG(Eip, 4),
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REG(Eip, 4, CONTEXT_CONTROL),
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REG(EFlags, 4),
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REG(EFlags, 4, CONTEXT_CONTROL),
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REG(SegCs, 4),
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REG(SegCs, 4, CONTEXT_CONTROL),
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REG(SegSs, 4),
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REG(SegSs, 4, CONTEXT_SEGMENTS),
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REG(SegDs, 4),
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REG(SegDs, 4, CONTEXT_SEGMENTS),
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REG(SegEs, 4),
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REG(SegEs, 4, CONTEXT_SEGMENTS),
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REG(SegFs, 4),
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REG(SegFs, 4, CONTEXT_SEGMENTS),
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REG(SegGs, 4),
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REG(SegGs, 4, CONTEXT_SEGMENTS),
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};
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};
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#elif defined(__powerpc__)
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#elif defined(__powerpc__)
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static const char target_xml[] = "";
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static const char target_xml[] = "";
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static struct cpu_register cpu_register_map[] = {
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static struct cpu_register cpu_register_map[] = {
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REG(Gpr0, 4),
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REG(Gpr0, 4, CONTEXT_INTEGER),
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REG(Gpr1, 4),
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REG(Gpr1, 4, CONTEXT_INTEGER),
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REG(Gpr2, 4),
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REG(Gpr2, 4, CONTEXT_INTEGER),
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REG(Gpr3, 4),
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REG(Gpr3, 4, CONTEXT_INTEGER),
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REG(Gpr4, 4),
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REG(Gpr4, 4, CONTEXT_INTEGER),
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REG(Gpr5, 4),
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REG(Gpr5, 4, CONTEXT_INTEGER),
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REG(Gpr6, 4),
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REG(Gpr6, 4, CONTEXT_INTEGER),
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REG(Gpr7, 4),
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REG(Gpr7, 4, CONTEXT_INTEGER),
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REG(Gpr8, 4),
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REG(Gpr8, 4, CONTEXT_INTEGER),
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REG(Gpr9, 4),
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REG(Gpr9, 4, CONTEXT_INTEGER),
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REG(Gpr10, 4),
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REG(Gpr10, 4, CONTEXT_INTEGER),
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REG(Gpr11, 4),
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REG(Gpr11, 4, CONTEXT_INTEGER),
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REG(Gpr12, 4),
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REG(Gpr12, 4, CONTEXT_INTEGER),
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REG(Gpr13, 4),
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REG(Gpr13, 4, CONTEXT_INTEGER),
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REG(Gpr14, 4),
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REG(Gpr14, 4, CONTEXT_INTEGER),
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REG(Gpr15, 4),
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REG(Gpr15, 4, CONTEXT_INTEGER),
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REG(Gpr16, 4),
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REG(Gpr16, 4, CONTEXT_INTEGER),
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REG(Gpr17, 4),
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REG(Gpr17, 4, CONTEXT_INTEGER),
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REG(Gpr18, 4),
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REG(Gpr18, 4, CONTEXT_INTEGER),
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REG(Gpr19, 4),
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REG(Gpr19, 4, CONTEXT_INTEGER),
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REG(Gpr20, 4),
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REG(Gpr20, 4, CONTEXT_INTEGER),
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REG(Gpr21, 4),
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REG(Gpr21, 4, CONTEXT_INTEGER),
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REG(Gpr22, 4),
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REG(Gpr22, 4, CONTEXT_INTEGER),
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REG(Gpr23, 4),
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REG(Gpr23, 4, CONTEXT_INTEGER),
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REG(Gpr24, 4),
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REG(Gpr24, 4, CONTEXT_INTEGER),
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REG(Gpr25, 4),
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REG(Gpr25, 4, CONTEXT_INTEGER),
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REG(Gpr26, 4),
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REG(Gpr26, 4, CONTEXT_INTEGER),
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REG(Gpr27, 4),
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REG(Gpr27, 4, CONTEXT_INTEGER),
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REG(Gpr28, 4),
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REG(Gpr28, 4, CONTEXT_INTEGER),
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REG(Gpr29, 4),
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REG(Gpr29, 4, CONTEXT_INTEGER),
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REG(Gpr30, 4),
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REG(Gpr30, 4, CONTEXT_INTEGER),
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REG(Gpr31, 4),
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REG(Gpr31, 4, CONTEXT_INTEGER),
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REG(Fpr0, 4),
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REG(Fpr0, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr1, 4),
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REG(Fpr1, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr2, 4),
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REG(Fpr2, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr3, 4),
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REG(Fpr3, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr4, 4),
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REG(Fpr4, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr5, 4),
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REG(Fpr5, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr6, 4),
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REG(Fpr6, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr7, 4),
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REG(Fpr7, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr8, 4),
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REG(Fpr8, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr9, 4),
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REG(Fpr9, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr10, 4),
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REG(Fpr10, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr11, 4),
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REG(Fpr11, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr12, 4),
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REG(Fpr12, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr13, 4),
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REG(Fpr13, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr14, 4),
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REG(Fpr14, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr15, 4),
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REG(Fpr15, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr16, 4),
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REG(Fpr16, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr17, 4),
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REG(Fpr17, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr18, 4),
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REG(Fpr18, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr19, 4),
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REG(Fpr19, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr20, 4),
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REG(Fpr20, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr21, 4),
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REG(Fpr21, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr22, 4),
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REG(Fpr22, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr23, 4),
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REG(Fpr23, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr24, 4),
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REG(Fpr24, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr25, 4),
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REG(Fpr25, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr26, 4),
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REG(Fpr26, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr27, 4),
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REG(Fpr27, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr28, 4),
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REG(Fpr28, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr29, 4),
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REG(Fpr29, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr30, 4),
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REG(Fpr30, 4, CONTEXT_FLOATING_POINT),
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REG(Fpr31, 4),
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REG(Fpr31, 4, CONTEXT_FLOATING_POINT),
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REG(Iar, 4),
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REG(Iar, 4, CONTEXT_CONTROL),
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REG(Msr, 4),
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REG(Msr, 4, CONTEXT_CONTROL),
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REG(Cr, 4),
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REG(Cr, 4, CONTEXT_INTEGER),
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REG(Lr, 4),
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REG(Lr, 4, CONTEXT_CONTROL),
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REG(Ctr, 4),
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REG(Ctr, 4, CONTEXT_CONTROL),
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REG(Xer, 4),
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REG(Xer, 4, CONTEXT_INTEGER),
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/* FIXME: MQ is missing? FIELD_OFFSET(CONTEXT, Mq), */
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/* FIXME: MQ is missing? FIELD_OFFSET(CONTEXT, Mq), */
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/* see gdb/nlm/ppc.c */
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/* see gdb/nlm/ppc.c */
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};
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};
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#elif defined(__x86_64__)
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#elif defined(__x86_64__)
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static const char target_xml[] = "";
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static const char target_xml[] = "";
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static struct cpu_register cpu_register_map[] = {
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static struct cpu_register cpu_register_map[] = {
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REG(Rax, 8),
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REG(Rax, 8, CONTEXT_INTEGER),
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REG(Rbx, 8),
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REG(Rbx, 8, CONTEXT_INTEGER),
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REG(Rcx, 8),
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REG(Rcx, 8, CONTEXT_INTEGER),
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REG(Rdx, 8),
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REG(Rdx, 8, CONTEXT_INTEGER),
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REG(Rsi, 8),
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REG(Rsi, 8, CONTEXT_INTEGER),
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REG(Rdi, 8),
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REG(Rdi, 8, CONTEXT_INTEGER),
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REG(Rbp, 8),
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REG(Rbp, 8, CONTEXT_INTEGER),
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REG(Rsp, 8),
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REG(Rsp, 8, CONTEXT_INTEGER),
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REG(R8, 8),
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REG(R8, 8, CONTEXT_INTEGER),
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REG(R9, 8),
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REG(R9, 8, CONTEXT_INTEGER),
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REG(R10, 8),
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REG(R10, 8, CONTEXT_INTEGER),
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REG(R11, 8),
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REG(R11, 8, CONTEXT_INTEGER),
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REG(R12, 8),
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REG(R12, 8, CONTEXT_INTEGER),
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REG(R13, 8),
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REG(R13, 8, CONTEXT_INTEGER),
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REG(R14, 8),
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REG(R14, 8, CONTEXT_INTEGER),
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REG(R15, 8),
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REG(R15, 8, CONTEXT_INTEGER),
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REG(Rip, 8),
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REG(Rip, 8, CONTEXT_CONTROL),
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REG(EFlags, 4),
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REG(EFlags, 4, CONTEXT_CONTROL),
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REG(SegCs, 4),
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REG(SegCs, 4, CONTEXT_CONTROL),
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REG(SegSs, 4),
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REG(SegSs, 4, CONTEXT_CONTROL),
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REG(SegDs, 4),
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REG(SegDs, 4, CONTEXT_SEGMENTS),
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REG(SegEs, 4),
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REG(SegEs, 4, CONTEXT_SEGMENTS),
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REG(SegFs, 4),
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REG(SegFs, 4, CONTEXT_SEGMENTS),
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REG(SegGs, 4),
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REG(SegGs, 4, CONTEXT_SEGMENTS),
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};
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};
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#elif defined(__arm__)
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#elif defined(__arm__)
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static const char target_xml[] =
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static const char target_xml[] =
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@ -361,61 +362,61 @@ static const char target_xml[] =
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"</feature></target>\n";
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"</feature></target>\n";
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static struct cpu_register cpu_register_map[] = {
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static struct cpu_register cpu_register_map[] = {
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REG(R0, 4),
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REG(R0, 4, CONTEXT_INTEGER),
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REG(R1, 4),
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REG(R1, 4, CONTEXT_INTEGER),
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REG(R2, 4),
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REG(R2, 4, CONTEXT_INTEGER),
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REG(R3, 4),
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REG(R3, 4, CONTEXT_INTEGER),
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REG(R4, 4),
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REG(R4, 4, CONTEXT_INTEGER),
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REG(R5, 4),
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REG(R5, 4, CONTEXT_INTEGER),
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REG(R6, 4),
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REG(R6, 4, CONTEXT_INTEGER),
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REG(R7, 4),
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REG(R7, 4, CONTEXT_INTEGER),
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REG(R8, 4),
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REG(R8, 4, CONTEXT_INTEGER),
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REG(R9, 4),
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REG(R9, 4, CONTEXT_INTEGER),
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REG(R10, 4),
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REG(R10, 4, CONTEXT_INTEGER),
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REG(Fp, 4),
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REG(Fp, 4, CONTEXT_INTEGER),
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REG(Ip, 4),
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REG(Ip, 4, CONTEXT_INTEGER),
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REG(Sp, 4),
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REG(Sp, 4, CONTEXT_CONTROL),
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REG(Lr, 4),
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REG(Lr, 4, CONTEXT_CONTROL),
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REG(Pc, 4),
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REG(Pc, 4, CONTEXT_CONTROL),
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REG(Cpsr, 4),
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REG(Cpsr, 4, CONTEXT_CONTROL),
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};
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};
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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static const char target_xml[] = "";
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static const char target_xml[] = "";
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static struct cpu_register cpu_register_map[] = {
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static struct cpu_register cpu_register_map[] = {
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REG(X0, 8),
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REG(X0, 8, CONTEXT_INTEGER),
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REG(X1, 8),
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REG(X1, 8, CONTEXT_INTEGER),
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REG(X2, 8),
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REG(X2, 8, CONTEXT_INTEGER),
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REG(X3, 8),
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REG(X3, 8, CONTEXT_INTEGER),
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REG(X4, 8),
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REG(X4, 8, CONTEXT_INTEGER),
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REG(X5, 8),
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REG(X5, 8, CONTEXT_INTEGER),
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REG(X6, 8),
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REG(X6, 8, CONTEXT_INTEGER),
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REG(X7, 8),
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REG(X7, 8, CONTEXT_INTEGER),
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REG(X8, 8),
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REG(X8, 8, CONTEXT_INTEGER),
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REG(X9, 8),
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REG(X9, 8, CONTEXT_INTEGER),
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REG(X10, 8),
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REG(X10, 8, CONTEXT_INTEGER),
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REG(X11, 8),
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REG(X11, 8, CONTEXT_INTEGER),
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REG(X12, 8),
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REG(X12, 8, CONTEXT_INTEGER),
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REG(X13, 8),
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REG(X13, 8, CONTEXT_INTEGER),
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REG(X14, 8),
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REG(X14, 8, CONTEXT_INTEGER),
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REG(X15, 8),
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REG(X15, 8, CONTEXT_INTEGER),
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REG(X16, 8),
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REG(X16, 8, CONTEXT_INTEGER),
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REG(X17, 8),
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REG(X17, 8, CONTEXT_INTEGER),
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REG(X18, 8),
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REG(X18, 8, CONTEXT_INTEGER),
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REG(X19, 8),
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REG(X19, 8, CONTEXT_INTEGER),
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REG(X20, 8),
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REG(X20, 8, CONTEXT_INTEGER),
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REG(X21, 8),
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REG(X21, 8, CONTEXT_INTEGER),
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REG(X22, 8),
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REG(X22, 8, CONTEXT_INTEGER),
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REG(X23, 8),
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REG(X23, 8, CONTEXT_INTEGER),
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REG(X24, 8),
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REG(X24, 8, CONTEXT_INTEGER),
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REG(X25, 8),
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REG(X25, 8, CONTEXT_INTEGER),
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REG(X26, 8),
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REG(X26, 8, CONTEXT_INTEGER),
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REG(X27, 8),
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REG(X27, 8, CONTEXT_INTEGER),
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REG(X28, 8),
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REG(X28, 8, CONTEXT_INTEGER),
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REG(X29, 8),
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REG(X29, 8, CONTEXT_INTEGER),
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REG(X30, 8),
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REG(X30, 8, CONTEXT_INTEGER),
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REG(Sp, 8),
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REG(Sp, 8, CONTEXT_CONTROL),
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REG(Pc, 8),
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REG(Pc, 8, CONTEXT_CONTROL),
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REG(PState, 8),
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REG(PState, 8, CONTEXT_CONTROL),
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};
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};
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#else
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#else
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# error Define the registers map for your CPU
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# error Define the registers map for your CPU
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@ -474,6 +475,9 @@ static BOOL fetch_context(struct gdb_context* gdbctx, HANDLE h, CONTEXT* ctx)
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{
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{
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ctx->ContextFlags = CONTEXT_CONTROL
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ctx->ContextFlags = CONTEXT_CONTROL
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| CONTEXT_INTEGER
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| CONTEXT_INTEGER
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#if defined(__powerpc__)
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| CONTEXT_FLOATING_POINT
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#endif
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#ifdef CONTEXT_SEGMENTS
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#ifdef CONTEXT_SEGMENTS
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| CONTEXT_SEGMENTS
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| CONTEXT_SEGMENTS
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#endif
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#endif
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@ -1042,6 +1046,10 @@ static enum packet_return packet_reply_status(struct gdb_context* gdbctx)
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for (i = 0; i < cpu_num_regs; i++)
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for (i = 0; i < cpu_num_regs; i++)
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{
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{
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ULONG flags = cpu_register_map[i].ctx_flags;
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if ((gdbctx->context.ContextFlags & flags) != flags)
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break;
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/* FIXME: this call will also grow the buffer...
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/* FIXME: this call will also grow the buffer...
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* unneeded, but not harmful
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* unneeded, but not harmful
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*/
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*/
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@ -1379,6 +1387,9 @@ static enum packet_return packet_read_registers(struct gdb_context* gdbctx)
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packet_reply_open(gdbctx);
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packet_reply_open(gdbctx);
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for (i = 0; i < cpu_num_regs; i++)
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for (i = 0; i < cpu_num_regs; i++)
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{
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{
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ULONG flags = cpu_register_map[i].ctx_flags;
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if ((gdbctx->context.ContextFlags & flags) != flags)
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break;
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packet_reply_register_hex_to(gdbctx, i);
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packet_reply_register_hex_to(gdbctx, i);
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}
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}
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packet_reply_close(gdbctx);
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packet_reply_close(gdbctx);
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@ -1403,6 +1414,9 @@ static enum packet_return packet_write_registers(struct gdb_context* gdbctx)
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ptr = gdbctx->in_packet;
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ptr = gdbctx->in_packet;
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for (i = 0; i < cpu_num_regs; i++)
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for (i = 0; i < cpu_num_regs; i++)
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{
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{
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ULONG flags = cpu_register_map[i].ctx_flags;
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if ((pctx->ContextFlags & flags) != flags)
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break;
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cpu_register_hex_from(pctx, i, &ptr);
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cpu_register_hex_from(pctx, i, &ptr);
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}
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}
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if (pctx != &gdbctx->context && !SetThreadContext(gdbctx->other_thread->handle, pctx))
|
if (pctx != &gdbctx->context && !SetThreadContext(gdbctx->other_thread->handle, pctx))
|
||||||
|
|
@ -1597,6 +1611,12 @@ static enum packet_return packet_write_register(struct gdb_context* gdbctx)
|
||||||
if (!fetch_context(gdbctx, gdbctx->other_thread->handle, pctx = &ctx))
|
if (!fetch_context(gdbctx, gdbctx->other_thread->handle, pctx = &ctx))
|
||||||
return packet_error;
|
return packet_error;
|
||||||
}
|
}
|
||||||
|
if ((pctx->ContextFlags & cpu_register_map[reg].ctx_flags) != cpu_register_map[reg].ctx_flags)
|
||||||
|
{
|
||||||
|
if (gdbctx->trace & GDBPXY_TRC_COMMAND_ERROR)
|
||||||
|
fprintf(stderr, "Writing reg %u is not supported on this host\n", reg);
|
||||||
|
return packet_error;
|
||||||
|
}
|
||||||
|
|
||||||
cpu_register_hex_from(pctx, reg, (const char**)&ptr);
|
cpu_register_hex_from(pctx, reg, (const char**)&ptr);
|
||||||
if (pctx != &gdbctx->context && !SetThreadContext(gdbctx->other_thread->handle, pctx))
|
if (pctx != &gdbctx->context && !SetThreadContext(gdbctx->other_thread->handle, pctx))
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue