wined3d: Pass a struct wined3d_shader_register to shader_record_register_usage().
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parent
2039702035
commit
adc9bfe3fd
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@ -246,24 +246,24 @@ static inline void set_bitmap_bit(DWORD *bitmap, DWORD bit)
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}
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}
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static void shader_record_register_usage(IWineD3DBaseShaderImpl *This, struct shader_reg_maps *reg_maps,
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static void shader_record_register_usage(IWineD3DBaseShaderImpl *This, struct shader_reg_maps *reg_maps,
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DWORD register_type, UINT register_idx, BOOL has_rel_addr, BOOL pshader)
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const struct wined3d_shader_register *reg, BOOL pshader)
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{
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{
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switch (register_type)
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switch (reg->type)
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{
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{
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case WINED3DSPR_TEXTURE: /* WINED3DSPR_ADDR */
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case WINED3DSPR_TEXTURE: /* WINED3DSPR_ADDR */
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if (pshader) reg_maps->texcoord[register_idx] = 1;
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if (pshader) reg_maps->texcoord[reg->idx] = 1;
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else reg_maps->address[register_idx] = 1;
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else reg_maps->address[reg->idx] = 1;
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break;
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break;
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case WINED3DSPR_TEMP:
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case WINED3DSPR_TEMP:
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reg_maps->temporary[register_idx] = 1;
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reg_maps->temporary[reg->idx] = 1;
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break;
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break;
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case WINED3DSPR_INPUT:
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case WINED3DSPR_INPUT:
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if (!pshader) reg_maps->attributes[register_idx] = 1;
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if (!pshader) reg_maps->attributes[reg->idx] = 1;
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else
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else
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{
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{
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if (has_rel_addr)
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if (reg->rel_addr)
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{
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{
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/* If relative addressing is used, we must assume that all registers
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/* If relative addressing is used, we must assume that all registers
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* are used. Even if it is a construct like v3[aL], we can't assume
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* are used. Even if it is a construct like v3[aL], we can't assume
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@ -276,68 +276,68 @@ static void shader_record_register_usage(IWineD3DBaseShaderImpl *This, struct sh
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}
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}
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else
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else
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{
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{
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((IWineD3DPixelShaderImpl *)This)->input_reg_used[register_idx] = TRUE;
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((IWineD3DPixelShaderImpl *)This)->input_reg_used[reg->idx] = TRUE;
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}
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}
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}
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}
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break;
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break;
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case WINED3DSPR_RASTOUT:
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case WINED3DSPR_RASTOUT:
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if (register_idx == 1) reg_maps->fog = 1;
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if (reg->idx == 1) reg_maps->fog = 1;
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break;
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break;
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case WINED3DSPR_MISCTYPE:
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case WINED3DSPR_MISCTYPE:
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if (pshader && register_idx == 0) reg_maps->vpos = 1;
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if (pshader && reg->idx == 0) reg_maps->vpos = 1;
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break;
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break;
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case WINED3DSPR_CONST:
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case WINED3DSPR_CONST:
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if (has_rel_addr)
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if (reg->rel_addr)
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{
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{
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if (!pshader)
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if (!pshader)
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{
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{
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if (register_idx <= ((IWineD3DVertexShaderImpl *)This)->min_rel_offset)
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if (reg->idx <= ((IWineD3DVertexShaderImpl *)This)->min_rel_offset)
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((IWineD3DVertexShaderImpl *)This)->min_rel_offset = register_idx;
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((IWineD3DVertexShaderImpl *)This)->min_rel_offset = reg->idx;
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else if (register_idx >= ((IWineD3DVertexShaderImpl *)This)->max_rel_offset)
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else if (reg->idx >= ((IWineD3DVertexShaderImpl *)This)->max_rel_offset)
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((IWineD3DVertexShaderImpl *)This)->max_rel_offset = register_idx;
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((IWineD3DVertexShaderImpl *)This)->max_rel_offset = reg->idx;
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}
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}
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reg_maps->usesrelconstF = TRUE;
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reg_maps->usesrelconstF = TRUE;
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}
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}
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else
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else
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{
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{
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set_bitmap_bit(reg_maps->constf, register_idx);
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set_bitmap_bit(reg_maps->constf, reg->idx);
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}
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}
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break;
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break;
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case WINED3DSPR_CONSTINT:
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case WINED3DSPR_CONSTINT:
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reg_maps->integer_constants |= (1 << register_idx);
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reg_maps->integer_constants |= (1 << reg->idx);
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break;
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break;
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case WINED3DSPR_CONSTBOOL:
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case WINED3DSPR_CONSTBOOL:
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reg_maps->boolean_constants |= (1 << register_idx);
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reg_maps->boolean_constants |= (1 << reg->idx);
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break;
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break;
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default:
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default:
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TRACE("Not recording register of type %#x and idx %u\n", register_type, register_idx);
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TRACE("Not recording register of type %#x and idx %u\n", reg->type, reg->idx);
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break;
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break;
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}
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}
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}
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}
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static unsigned char get_instr_regcount(enum WINED3D_SHADER_INSTRUCTION_HANDLER instr, int param)
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static unsigned int get_instr_extra_regcount(enum WINED3D_SHADER_INSTRUCTION_HANDLER instr, unsigned int param)
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{
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{
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switch(instr)
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switch(instr)
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{
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{
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case WINED3DSIH_M4x4:
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case WINED3DSIH_M4x4:
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case WINED3DSIH_M3x4:
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case WINED3DSIH_M3x4:
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return param == 1 ? 4 : 1;
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return param == 1 ? 3 : 0;
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case WINED3DSIH_M4x3:
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case WINED3DSIH_M4x3:
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case WINED3DSIH_M3x3:
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case WINED3DSIH_M3x3:
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return param == 1 ? 3 : 1;
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return param == 1 ? 2 : 0;
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case WINED3DSIH_M3x2:
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case WINED3DSIH_M3x2:
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return param == 1 ? 2 : 1;
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return param == 1 ? 1 : 0;
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default:
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default:
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return 1;
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return 0;
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}
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}
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}
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}
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@ -558,8 +558,7 @@ HRESULT shader_get_registers_used(IWineD3DBaseShader *iface, const struct wined3
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}
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}
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else
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else
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{
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{
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shader_record_register_usage(This, reg_maps, dst_param.reg.type,
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shader_record_register_usage(This, reg_maps, &dst_param.reg, pshader);
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dst_param.reg.idx, !!dst_param.reg.rel_addr, pshader);
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}
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}
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/* Declare 1.X samplers implicitly, based on the destination reg. number */
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/* Declare 1.X samplers implicitly, based on the destination reg. number */
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@ -617,25 +616,17 @@ HRESULT shader_get_registers_used(IWineD3DBaseShader *iface, const struct wined3
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for (i = 0; i < limit; ++i)
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for (i = 0; i < limit; ++i)
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{
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{
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struct wined3d_shader_src_param src_param, src_rel_addr;
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struct wined3d_shader_src_param src_param, src_rel_addr;
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unsigned int count;
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fe->shader_read_src_param(fe_data, &pToken, &src_param, &src_rel_addr);
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fe->shader_read_src_param(fe_data, &pToken, &src_param, &src_rel_addr);
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switch(get_instr_regcount(ins.handler_idx, i))
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count = get_instr_extra_regcount(ins.handler_idx, i);
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shader_record_register_usage(This, reg_maps, &src_param.reg, pshader);
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while (count)
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{
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{
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case 4:
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++src_param.reg.idx;
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shader_record_register_usage(This, reg_maps, src_param.reg.type,
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shader_record_register_usage(This, reg_maps, &src_param.reg, pshader);
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src_param.reg.idx + 3, !!src_param.reg.rel_addr, pshader);
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--count;
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/* drop through */
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case 3:
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shader_record_register_usage(This, reg_maps, src_param.reg.type,
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src_param.reg.idx + 2, !!src_param.reg.rel_addr, pshader);
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/* drop through */
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case 2:
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shader_record_register_usage(This, reg_maps, src_param.reg.type,
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src_param.reg.idx + 1, !!src_param.reg.rel_addr, pshader);
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/* drop through */
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case 1:
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shader_record_register_usage(This, reg_maps, src_param.reg.type,
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src_param.reg.idx, !!src_param.reg.rel_addr, pshader);
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}
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}
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}
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}
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}
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}
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