From aaf78f1a0b63d0a6c5c11f9ef8bf0dbc7d0cb427 Mon Sep 17 00:00:00 2001 From: Francois Gouget Date: Sun, 29 Aug 2010 23:40:33 +0200 Subject: [PATCH] d3dcompiler_43: Don't use nameless unions in our private structures to avoid trouble with compilers where they are not supported. --- dlls/d3dcompiler_43/asmparser.c | 24 ++++++------- dlls/d3dcompiler_43/asmshader.y | 34 +++++++++--------- dlls/d3dcompiler_43/asmutils.c | 32 ++++++++--------- dlls/d3dcompiler_43/bytecodewriter.c | 42 +++++++++++------------ dlls/d3dcompiler_43/d3dcompiler_private.h | 2 +- 5 files changed, 67 insertions(+), 67 deletions(-) diff --git a/dlls/d3dcompiler_43/asmparser.c b/dlls/d3dcompiler_43/asmparser.c index bcef8d406ea..8d65d046ffd 100644 --- a/dlls/d3dcompiler_43/asmparser.c +++ b/dlls/d3dcompiler_43/asmparser.c @@ -110,7 +110,7 @@ static void asmparser_dcl_output(struct asm_parser *This, DWORD usage, DWORD num asmparser_message(This, "Line %u: Output register declared in a pixel shader\n", This->line_no); set_parse_status(This, PARSE_ERR); } - if(!record_declaration(This->shader, usage, num, 0, TRUE, reg->regnum, reg->writemask, FALSE)) { + if(!record_declaration(This->shader, usage, num, 0, TRUE, reg->regnum, reg->u.writemask, FALSE)) { ERR("Out of memory\n"); set_parse_status(This, PARSE_ERR); } @@ -141,7 +141,7 @@ static void asmparser_dcl_input(struct asm_parser *This, DWORD usage, DWORD num, instr.shift = 0; This->funcs->dstreg(This, &instr, reg); - if(!record_declaration(This->shader, usage, num, mod, FALSE, reg->regnum, reg->writemask, FALSE)) { + if(!record_declaration(This->shader, usage, num, mod, FALSE, reg->regnum, reg->u.writemask, FALSE)) { ERR("Out of memory\n"); set_parse_status(This, PARSE_ERR); } @@ -155,7 +155,7 @@ static void asmparser_dcl_input_ps_2(struct asm_parser *This, DWORD usage, DWORD instr.dstmod = mod; instr.shift = 0; This->funcs->dstreg(This, &instr, reg); - if(!record_declaration(This->shader, usage, num, mod, FALSE, instr.dst.regnum, instr.dst.writemask, FALSE)) { + if(!record_declaration(This->shader, usage, num, mod, FALSE, instr.dst.regnum, instr.dst.u.writemask, FALSE)) { ERR("Out of memory\n"); set_parse_status(This, PARSE_ERR); } @@ -396,7 +396,7 @@ static void asmparser_texhelper(struct asm_parser *This, DWORD mod, DWORD shift, ZeroMemory(&instr->src[1], sizeof(instr->src[1])); instr->src[1].type = BWRITERSPR_SAMPLER; instr->src[1].regnum = dst->regnum; - instr->src[1].swizzle = BWRITERVS_NOSWIZZLE; + instr->src[1].u.swizzle = BWRITERVS_NOSWIZZLE; instr->src[1].srcmod = BWRITERSPSM_NONE; instr->src[1].rel_reg = NULL; @@ -450,7 +450,7 @@ static void asmparser_texld14(struct asm_parser *This, DWORD mod, DWORD shift, ZeroMemory(&instr->src[1], sizeof(instr->src[1])); instr->src[1].type = BWRITERSPR_SAMPLER; instr->src[1].regnum = dst->regnum; - instr->src[1].swizzle = BWRITERVS_NOSWIZZLE; + instr->src[1].u.swizzle = BWRITERVS_NOSWIZZLE; instr->src[1].srcmod = BWRITERSPSM_NONE; instr->src[1].rel_reg = NULL; @@ -467,7 +467,7 @@ static void asmparser_texreg2ar(struct asm_parser *This, DWORD mod, DWORD shift, src = map_oldps_register(src0, FALSE); /* Supply the correct swizzle */ - src.swizzle = BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X; + src.u.swizzle = BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X; asmparser_texhelper(This, mod, shift, dst, &src); } @@ -478,7 +478,7 @@ static void asmparser_texreg2gb(struct asm_parser *This, DWORD mod, DWORD shift, src = map_oldps_register(src0, FALSE); /* Supply the correct swizzle */ - src.swizzle = BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z; + src.u.swizzle = BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z; asmparser_texhelper(This, mod, shift, dst, &src); } @@ -489,7 +489,7 @@ static void asmparser_texreg2rgb(struct asm_parser *This, DWORD mod, DWORD shift src = map_oldps_register(src0, FALSE); /* Supply the correct swizzle */ - src.swizzle = BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z | BWRITERVS_W_Z; + src.u.swizzle = BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z | BWRITERVS_W_Z; asmparser_texhelper(This, mod, shift, dst, &src); } @@ -618,11 +618,11 @@ static struct shader_reg map_oldvs_register(const struct shader_reg *reg) { break; case BWRITERSRO_FOG: ret.regnum = OFOG_REG; - ret.writemask = OFOG_WRITEMASK; + ret.u.writemask = OFOG_WRITEMASK; break; case BWRITERSRO_POINT_SIZE: ret.regnum = OPTS_REG; - ret.writemask = OPTS_WRITEMASK; + ret.u.writemask = OPTS_WRITEMASK; break; default: FIXME("Unhandled RASTOUT register %u\n", reg->regnum); @@ -690,9 +690,9 @@ static void check_abs_srcmod(struct asm_parser *This, DWORD srcmod) { static void check_loop_swizzle(struct asm_parser *This, const struct shader_reg *src) { - if((src->type == BWRITERSPR_LOOP && src->swizzle != BWRITERVS_NOSWIZZLE) || + if((src->type == BWRITERSPR_LOOP && src->u.swizzle != BWRITERVS_NOSWIZZLE) || (src->rel_reg && src->rel_reg->type == BWRITERSPR_LOOP && - src->rel_reg->swizzle != BWRITERVS_NOSWIZZLE)) { + src->rel_reg->u.swizzle != BWRITERVS_NOSWIZZLE)) { asmparser_message(This, "Line %u: Swizzle not allowed on aL register\n", This->line_no); set_parse_status(This, PARSE_ERR); } diff --git a/dlls/d3dcompiler_43/asmshader.y b/dlls/d3dcompiler_43/asmshader.y index 764010ece14..4e22c9540c1 100644 --- a/dlls/d3dcompiler_43/asmshader.y +++ b/dlls/d3dcompiler_43/asmshader.y @@ -48,7 +48,7 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) { return; } reg->rel_reg->type = rel->type; - reg->rel_reg->swizzle = rel->swizzle; + reg->rel_reg->u.swizzle = rel->swizzle; reg->rel_reg->regnum = rel->rel_regnum; } } @@ -557,7 +557,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3; reg.rel_reg = NULL; reg.srcmod = 0; - reg.writemask = BWRITERSP_WRITEMASK_ALL; + reg.u.writemask = BWRITERSP_WRITEMASK_ALL; asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, ®); } | INSTR_DCL dclusage REG_OUTPUT writemask @@ -569,7 +569,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3; reg.rel_reg = NULL; reg.srcmod = 0; - reg.writemask = $4; + reg.u.writemask = $4; asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, ®); } | INSTR_DCL dclusage omods dcl_inputreg @@ -592,7 +592,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $4.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.writemask = BWRITERSP_WRITEMASK_ALL; + reg.u.writemask = BWRITERSP_WRITEMASK_ALL; asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, ®); } | INSTR_DCL dclusage omods dcl_inputreg writemask @@ -615,7 +615,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $4.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.writemask = $5; + reg.u.writemask = $5; asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, ®); } | INSTR_DCL omods dcl_inputreg @@ -637,7 +637,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.writemask = BWRITERSP_WRITEMASK_ALL; + reg.u.writemask = BWRITERSP_WRITEMASK_ALL; asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, ®); } | INSTR_DCL omods dcl_inputreg writemask @@ -659,7 +659,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.writemask = $4; + reg.u.writemask = $4; asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, ®); } | INSTR_DCL sampdcl omods REG_SAMPLER @@ -976,7 +976,7 @@ dreg: dreg_name rel_reg { $$.regnum = $1.regnum; $$.type = $1.type; - $$.writemask = BWRITERSP_WRITEMASK_ALL; + $$.u.writemask = BWRITERSP_WRITEMASK_ALL; $$.srcmod = BWRITERSPSM_NONE; set_rel_reg(&$$, &$2); } @@ -984,7 +984,7 @@ dreg: dreg_name rel_reg { $$.regnum = $1.regnum; $$.type = $1.type; - $$.writemask = $2; + $$.u.writemask = $2; $$.srcmod = BWRITERSPSM_NONE; $$.rel_reg = NULL; } @@ -1250,7 +1250,7 @@ sreg: sreg_name rel_reg swizzle { $$.type = $1.type; $$.regnum = $1.regnum; - $$.swizzle = $3; + $$.u.swizzle = $3; $$.srcmod = BWRITERSPSM_NONE; set_rel_reg(&$$, &$2); } @@ -1260,7 +1260,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $1.regnum; set_rel_reg(&$$, &$2); $$.srcmod = $3; - $$.swizzle = $4; + $$.u.swizzle = $4; } | '-' sreg_name rel_reg swizzle { @@ -1268,7 +1268,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $2.regnum; $$.srcmod = BWRITERSPSM_NEG; set_rel_reg(&$$, &$3); - $$.swizzle = $4; + $$.u.swizzle = $4; } | '-' sreg_name rel_reg smod swizzle { @@ -1293,7 +1293,7 @@ sreg: sreg_name rel_reg swizzle default: FIXME("Unhandled combination of NEGATE and %u\n", $4); } - $$.swizzle = $5; + $$.u.swizzle = $5; } | IMMVAL '-' sreg_name rel_reg swizzle { @@ -1307,7 +1307,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $3.regnum; $$.srcmod = BWRITERSPSM_COMP; set_rel_reg(&$$, &$4); - $$.swizzle = $5; + $$.u.swizzle = $5; } | IMMVAL '-' sreg_name rel_reg smod swizzle { @@ -1329,7 +1329,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $2.regnum; $$.rel_reg = NULL; $$.srcmod = BWRITERSPSM_NOT; - $$.swizzle = $3; + $$.u.swizzle = $3; } rel_reg: /* empty */ @@ -1647,7 +1647,7 @@ predicate: '(' REG_PREDICATE swizzle ')' $$.regnum = 0; $$.rel_reg = NULL; $$.srcmod = BWRITERSPSM_NONE; - $$.swizzle = $3; + $$.u.swizzle = $3; } | '(' SMOD_NOT REG_PREDICATE swizzle ')' { @@ -1655,7 +1655,7 @@ predicate: '(' REG_PREDICATE swizzle ')' $$.regnum = 0; $$.rel_reg = NULL; $$.srcmod = BWRITERSPSM_NOT; - $$.swizzle = $4; + $$.u.swizzle = $4; } %% diff --git a/dlls/d3dcompiler_43/asmutils.c b/dlls/d3dcompiler_43/asmutils.c index e6f0d747011..11f5d225343 100644 --- a/dlls/d3dcompiler_43/asmutils.c +++ b/dlls/d3dcompiler_43/asmutils.c @@ -423,7 +423,7 @@ static const char *debug_print_relarg(const struct shader_reg *reg) { const char *short_swizzle; if(!reg->rel_reg) return ""; - short_swizzle = debug_print_swizzle(reg->rel_reg->swizzle); + short_swizzle = debug_print_swizzle(reg->rel_reg->u.swizzle); if(reg->rel_reg->type == BWRITERSPR_ADDR) { return wine_dbg_sprintf("[a%u%s]", reg->rel_reg->regnum, short_swizzle); @@ -437,7 +437,7 @@ static const char *debug_print_relarg(const struct shader_reg *reg) { const char *debug_print_dstreg(const struct shader_reg *reg) { return wine_dbg_sprintf("%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_writemask(reg->writemask)); + debug_print_writemask(reg->u.writemask)); } const char *debug_print_srcreg(const struct shader_reg *reg) { @@ -445,59 +445,59 @@ const char *debug_print_srcreg(const struct shader_reg *reg) { case BWRITERSPSM_NONE: return wine_dbg_sprintf("%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_NEG: return wine_dbg_sprintf("-%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_BIAS: return wine_dbg_sprintf("%s%s_bias%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_BIASNEG: return wine_dbg_sprintf("-%s%s_bias%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_SIGN: return wine_dbg_sprintf("%s%s_bx2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_SIGNNEG: return wine_dbg_sprintf("-%s%s_bx2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_COMP: return wine_dbg_sprintf("1 - %s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_X2: return wine_dbg_sprintf("%s%s_x2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_X2NEG: return wine_dbg_sprintf("-%s%s_x2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_DZ: return wine_dbg_sprintf("%s%s_dz%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_DW: return wine_dbg_sprintf("%s%s_dw%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_ABS: return wine_dbg_sprintf("%s%s_abs%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_ABSNEG: return wine_dbg_sprintf("-%s%s_abs%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); case BWRITERSPSM_NOT: return wine_dbg_sprintf("!%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->swizzle)); + debug_print_swizzle(reg->u.swizzle)); } return "Unknown modifier"; } diff --git a/dlls/d3dcompiler_43/bytecodewriter.c b/dlls/d3dcompiler_43/bytecodewriter.c index 01038fb34e4..5b22580a708 100644 --- a/dlls/d3dcompiler_43/bytecodewriter.c +++ b/dlls/d3dcompiler_43/bytecodewriter.c @@ -373,7 +373,7 @@ static void write_declarations(struct bc_writer *This, /* Write the dest register */ reg.type = type; reg.regnum = decls[i].regnum; - reg.writemask = decls[i].writemask; + reg.u.writemask = decls[i].writemask; This->funcs->dstreg(This, ®, buffer, 0, decls[i].mod); } } @@ -687,7 +687,7 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, switch(reg->type) { case BWRITERSPR_OUTPUT: - token |= map_vs_output(This, reg->regnum, reg->writemask, &has_wmask); + token |= map_vs_output(This, reg->regnum, reg->u.writemask, &has_wmask); break; case BWRITERSPR_RASTOUT: @@ -747,7 +747,7 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, token |= d3d9_dstmod(mod); if(has_wmask) { - token |= d3d9_writemask(reg->writemask); + token |= d3d9_writemask(reg->u.writemask); } put_dword(buffer, token); } @@ -763,7 +763,7 @@ static void vs_1_x_srcreg(struct bc_writer *This, const struct shader_reg *reg, /* Map the swizzle to a writemask, the format expected by map_vs_output */ - switch(reg->swizzle) { + switch(reg->u.swizzle) { case BWRITERVS_SWIZZLE_X: component = BWRITERSP_WRITEMASK_0; break; @@ -798,7 +798,7 @@ static void vs_1_x_srcreg(struct bc_writer *This, const struct shader_reg *reg, if(reg->rel_reg) { if(reg->rel_reg->type != BWRITERSPR_ADDR || reg->rel_reg->regnum != 0 || - reg->rel_reg->swizzle != BWRITERVS_SWIZZLE_X) { + reg->rel_reg->u.swizzle != BWRITERVS_SWIZZLE_X) { WARN("Relative addressing in vs_1_x is only allowed with a0.x\n"); This->state = E_INVALIDARG; return; @@ -813,7 +813,7 @@ static void vs_1_x_srcreg(struct bc_writer *This, const struct shader_reg *reg, return; } - token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ token |= d3d9_srcmod(reg->srcmod); put_dword(buffer, token); @@ -908,7 +908,7 @@ static void ps_1_0123_srcreg(struct bc_writer *This, const struct shader_reg *re return; } - token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ if(reg->srcmod == BWRITERSPSM_DZ || reg->srcmod == BWRITERSPSM_DW || reg->srcmod == BWRITERSPSM_ABS || reg->srcmod == BWRITERSPSM_ABSNEG || @@ -951,7 +951,7 @@ static void ps_1_0123_dstreg(struct bc_writer *This, const struct shader_reg *re token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod); - token |= d3d9_writemask(reg->writemask); + token |= d3d9_writemask(reg->u.writemask); put_dword(buffer, token); } @@ -1079,17 +1079,17 @@ static void instr_ps_1_0123_texld(struct bc_writer *This, swizzlemask = (3 << BWRITERVS_SWIZZLE_SHIFT) | (3 << (BWRITERVS_SWIZZLE_SHIFT + 2)) | (3 << (BWRITERVS_SWIZZLE_SHIFT + 4)); - if((instr->src[0].swizzle & swizzlemask) == (BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z)) { + if((instr->src[0].u.swizzle & swizzlemask) == (BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z)) { TRACE("writing texreg2rgb\n"); This->funcs->opcode(This, instr, D3DSIO_TEXREG2RGB & D3DSI_OPCODE_MASK, buffer); - } else if(instr->src[0].swizzle == (BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X)) { + } else if(instr->src[0].u.swizzle == (BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X)) { TRACE("writing texreg2ar\n"); This->funcs->opcode(This, instr, D3DSIO_TEXREG2AR & D3DSI_OPCODE_MASK, buffer); - } else if(instr->src[0].swizzle == (BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z)) { + } else if(instr->src[0].u.swizzle == (BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z)) { TRACE("writing texreg2gb\n"); This->funcs->opcode(This, instr, D3DSIO_TEXREG2GB & D3DSI_OPCODE_MASK, buffer); } else { - WARN("Unsupported src addr swizzle in dependent texld: 0x%08x\n", instr->src[0].swizzle); + WARN("Unsupported src addr swizzle in dependent texld: 0x%08x\n", instr->src[0].u.swizzle); This->state = E_INVALIDARG; return; } @@ -1100,7 +1100,7 @@ static void instr_ps_1_0123_texld(struct bc_writer *This, */ This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); reg = instr->src[0]; - reg.swizzle = BWRITERVS_NOSWIZZLE; + reg.u.swizzle = BWRITERVS_NOSWIZZLE; This->funcs->srcreg(This, ®, buffer); } else { WARN("Invalid address data source register\n"); @@ -1211,7 +1211,7 @@ static void ps_1_4_srcreg(struct bc_writer *This, const struct shader_reg *reg, return; } - token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ if(reg->srcmod == BWRITERSPSM_ABS || reg->srcmod == BWRITERSPSM_ABSNEG || reg->srcmod == BWRITERSPSM_NOT) { @@ -1254,7 +1254,7 @@ static void ps_1_4_dstreg(struct bc_writer *This, const struct shader_reg *reg, token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod); - token |= d3d9_writemask(reg->writemask); + token |= d3d9_writemask(reg->u.writemask); put_dword(buffer, token); } @@ -1388,7 +1388,7 @@ static void vs_2_srcreg(struct bc_writer *This, /* Map the swizzle to a writemask, the format expected by map_vs_output */ - switch(reg->swizzle) { + switch(reg->u.swizzle) { case BWRITERVS_SWIZZLE_X: component = BWRITERSP_WRITEMASK_0; break; @@ -1461,7 +1461,7 @@ static void vs_2_srcreg(struct bc_writer *This, return; } - token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ token |= d3d9_srcmod(reg->srcmod); @@ -1706,7 +1706,7 @@ static void ps_2_srcreg(struct bc_writer *This, return; } - token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ token |= d3d9_srcmod(reg->srcmod); put_dword(buffer, token); @@ -1759,7 +1759,7 @@ static void ps_2_0_dstreg(struct bc_writer *This, token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod); - token |= d3d9_writemask(reg->writemask); + token |= d3d9_writemask(reg->u.writemask); put_dword(buffer, token); } @@ -1905,7 +1905,7 @@ static void sm_3_srcreg(struct bc_writer *This, token |= (d3d9reg << D3DSP_REGTYPE_SHIFT2) & D3DSP_REGTYPE_MASK2; token |= reg->regnum & D3DSP_REGNUM_MASK; - token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; + token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; token |= d3d9_srcmod(reg->srcmod); if(reg->rel_reg) { @@ -1960,7 +1960,7 @@ static void sm_3_dstreg(struct bc_writer *This, token |= d3d9_dstmod(mod); - token |= d3d9_writemask(reg->writemask); + token |= d3d9_writemask(reg->u.writemask); put_dword(buffer, token); /* vs_2_0 and newer write the register containing the index explicitly in the diff --git a/dlls/d3dcompiler_43/d3dcompiler_private.h b/dlls/d3dcompiler_43/d3dcompiler_private.h index 929e635710a..d76591acfbd 100644 --- a/dlls/d3dcompiler_43/d3dcompiler_private.h +++ b/dlls/d3dcompiler_43/d3dcompiler_private.h @@ -83,7 +83,7 @@ struct shader_reg { union { DWORD swizzle; DWORD writemask; - }; + } u; }; struct instruction {