include: Add more ARM64 CV constants.

This commit is contained in:
André Hentschel 2015-05-27 22:33:19 +02:00 committed by Alexandre Julliard
parent 39d71c52ef
commit 8e0164bd26
6 changed files with 61 additions and 38 deletions

View File

@ -39,7 +39,7 @@ static BOOL arm64_get_addr(HANDLE hThread, const CONTEXT* ctx,
#ifdef __aarch64__ #ifdef __aarch64__
case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE; case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE;
case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE; case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
case cpu_addr_frame: addr->Offset = ctx->X29; return TRUE; case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
#endif #endif
default: addr->Mode = -1; default: addr->Mode = -1;
return FALSE; return FALSE;
@ -67,7 +67,7 @@ static BOOL fetch_next_frame(struct cpu_stack_walk* csw,
CONTEXT* context, DWORD_PTR curr_pc) CONTEXT* context, DWORD_PTR curr_pc)
{ {
DWORD_PTR xframe; DWORD_PTR xframe;
DWORD_PTR oldReturn = context->X30; DWORD_PTR oldReturn = context->Lr;
if (dwarf2_virtual_unwind(csw, curr_pc, context, &xframe)) if (dwarf2_virtual_unwind(csw, curr_pc, context, &xframe))
{ {
@ -76,7 +76,7 @@ static BOOL fetch_next_frame(struct cpu_stack_walk* csw,
return TRUE; return TRUE;
} }
if (context->Pc == context->X30) return FALSE; if (context->Pc == context->Lr) return FALSE;
context->Pc = oldReturn; context->Pc = oldReturn;
return TRUE; return TRUE;
@ -121,8 +121,8 @@ static BOOL arm64_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, C
/* set frame information */ /* set frame information */
frame->AddrStack.Offset = context->Sp; frame->AddrStack.Offset = context->Sp;
frame->AddrReturn.Offset = context->X30; frame->AddrReturn.Offset = context->Lr;
frame->AddrFrame.Offset = context->X29; frame->AddrFrame.Offset = context->Fp;
frame->AddrPC.Offset = context->Pc; frame->AddrPC.Offset = context->Pc;
frame->Far = TRUE; frame->Far = TRUE;
@ -152,7 +152,9 @@ static BOOL arm64_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, C
static unsigned arm64_map_dwarf_register(unsigned regno) static unsigned arm64_map_dwarf_register(unsigned regno)
{ {
if (regno <= 30) return CV_ARM64_X0 + regno; if (regno <= 28) return CV_ARM64_X0 + regno;
if (regno == 29) return CV_ARM64_FP;
if (regno == 30) return CV_ARM64_LR;
if (regno == 31) return CV_ARM64_SP; if (regno == 31) return CV_ARM64_SP;
FIXME("Don't know how to map register %d\n", regno); FIXME("Don't know how to map register %d\n", regno);
@ -194,9 +196,9 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz
case CV_ARM64_X0 + 26: *size = sizeof(ctx->X26); return &ctx->X26; case CV_ARM64_X0 + 26: *size = sizeof(ctx->X26); return &ctx->X26;
case CV_ARM64_X0 + 27: *size = sizeof(ctx->X27); return &ctx->X27; case CV_ARM64_X0 + 27: *size = sizeof(ctx->X27); return &ctx->X27;
case CV_ARM64_X0 + 28: *size = sizeof(ctx->X28); return &ctx->X28; case CV_ARM64_X0 + 28: *size = sizeof(ctx->X28); return &ctx->X28;
case CV_ARM64_X0 + 29: *size = sizeof(ctx->X29); return &ctx->X29;
case CV_ARM64_X0 + 30: *size = sizeof(ctx->X30); return &ctx->X30;
case CV_ARM64_FP: *size = sizeof(ctx->Fp); return &ctx->Fp;
case CV_ARM64_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp; case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc; case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
case CV_ARM64_PSTATE: *size = sizeof(ctx->PState); return &ctx->PState; case CV_ARM64_PSTATE: *size = sizeof(ctx->PState); return &ctx->PState;
@ -239,9 +241,9 @@ static const char* arm64_fetch_regname(unsigned regno)
case CV_ARM64_X0 + 26: return "x26"; case CV_ARM64_X0 + 26: return "x26";
case CV_ARM64_X0 + 27: return "x27"; case CV_ARM64_X0 + 27: return "x27";
case CV_ARM64_X0 + 28: return "x28"; case CV_ARM64_X0 + 28: return "x28";
case CV_ARM64_X0 + 29: return "x29";
case CV_ARM64_X0 + 30: return "x30";
case CV_ARM64_FP: return "fp";
case CV_ARM64_LR: return "lr";
case CV_ARM64_SP: return "sp"; case CV_ARM64_SP: return "sp";
case CV_ARM64_PC: return "pc"; case CV_ARM64_PC: return "pc";
case CV_ARM64_PSTATE: return "cpsr"; case CV_ARM64_PSTATE: return "cpsr";
@ -275,7 +277,7 @@ static BOOL arm64_fetch_minidump_module(struct dump_context* dc, unsigned index,
DECLSPEC_HIDDEN struct cpu cpu_arm64 = { DECLSPEC_HIDDEN struct cpu cpu_arm64 = {
IMAGE_FILE_MACHINE_ARM64, IMAGE_FILE_MACHINE_ARM64,
8, 8,
CV_ARM64_X0 + 29, CV_ARM64_FP,
arm64_get_addr, arm64_get_addr,
arm64_stack_walk, arm64_stack_walk,
NULL, NULL,

View File

@ -121,10 +121,12 @@ static void save_context( CONTEXT *context, const ucontext_t *sigcontext )
/* Save normal registers */ /* Save normal registers */
C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9); C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9);
C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19); C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19);
C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28); C(29); C(30); C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28);
#undef C #undef C
context->ContextFlags = CONTEXT_FULL; context->ContextFlags = CONTEXT_FULL;
context->Fp = FP_sig(sigcontext); /* Frame pointer */
context->Lr = LR_sig(sigcontext); /* Link register */
context->Sp = SP_sig(sigcontext); /* Stack pointer */ context->Sp = SP_sig(sigcontext); /* Stack pointer */
context->Pc = PC_sig(sigcontext); /* Program Counter */ context->Pc = PC_sig(sigcontext); /* Program Counter */
context->PState = PSTATE_sig(sigcontext); /* Current State Register */ context->PState = PSTATE_sig(sigcontext); /* Current State Register */
@ -142,9 +144,11 @@ static void restore_context( const CONTEXT *context, ucontext_t *sigcontext )
/* Restore normal registers */ /* Restore normal registers */
C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9); C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9);
C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19); C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19);
C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28); C(29); C(30); C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28);
#undef C #undef C
FP_sig(sigcontext) = context->Fp; /* Frame pointer */
LR_sig(sigcontext) = context->Lr; /* Link register */
SP_sig(sigcontext) = context->Sp; /* Stack pointer */ SP_sig(sigcontext) = context->Sp; /* Stack pointer */
PC_sig(sigcontext) = context->Pc; /* Program Counter */ PC_sig(sigcontext) = context->Pc; /* Program Counter */
PSTATE_sig(sigcontext) = context->PState; /* Current State Register */ PSTATE_sig(sigcontext) = context->PState; /* Current State Register */
@ -201,6 +205,8 @@ void copy_context( CONTEXT *to, const CONTEXT *from, DWORD flags )
flags &= ~CONTEXT_ARM64; /* get rid of CPU id */ flags &= ~CONTEXT_ARM64; /* get rid of CPU id */
if (flags & CONTEXT_CONTROL) if (flags & CONTEXT_CONTROL)
{ {
to->Fp = from->Fp;
to->Lr = from->Lr;
to->Sp = from->Sp; to->Sp = from->Sp;
to->Pc = from->Pc; to->Pc = from->Pc;
to->PState = from->PState; to->PState = from->PState;
@ -211,7 +217,7 @@ void copy_context( CONTEXT *to, const CONTEXT *from, DWORD flags )
/* Restore normal registers */ /* Restore normal registers */
C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9); C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9);
C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19); C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19);
C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28); C(29); C(30); C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28);
#undef C #undef C
} }
} }
@ -231,6 +237,8 @@ NTSTATUS context_to_server( context_t *to, const CONTEXT *from )
if (flags & CONTEXT_CONTROL) if (flags & CONTEXT_CONTROL)
{ {
to->flags |= SERVER_CTX_CONTROL; to->flags |= SERVER_CTX_CONTROL;
to->integer.arm64_regs.x[29] = from->Fp;
to->integer.arm64_regs.x[30] = from->Lr;
to->ctl.arm64_regs.sp = from->Sp; to->ctl.arm64_regs.sp = from->Sp;
to->ctl.arm64_regs.pc = from->Pc; to->ctl.arm64_regs.pc = from->Pc;
to->ctl.arm64_regs.pstate = from->PState; to->ctl.arm64_regs.pstate = from->PState;
@ -242,7 +250,7 @@ NTSTATUS context_to_server( context_t *to, const CONTEXT *from )
/* Restore normal registers */ /* Restore normal registers */
C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9); C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9);
C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19); C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19);
C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28); C(29); C(30); C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28);
#undef C #undef C
} }
return STATUS_SUCCESS; return STATUS_SUCCESS;
@ -262,6 +270,8 @@ NTSTATUS context_from_server( CONTEXT *to, const context_t *from )
if (from->flags & SERVER_CTX_CONTROL) if (from->flags & SERVER_CTX_CONTROL)
{ {
to->ContextFlags |= CONTEXT_CONTROL; to->ContextFlags |= CONTEXT_CONTROL;
to->Fp = from->integer.arm64_regs.x[29];
to->Lr = from->integer.arm64_regs.x[30];
to->Sp = from->ctl.arm64_regs.sp; to->Sp = from->ctl.arm64_regs.sp;
to->Pc = from->ctl.arm64_regs.pc; to->Pc = from->ctl.arm64_regs.pc;
to->PState = from->ctl.arm64_regs.pstate; to->PState = from->ctl.arm64_regs.pstate;
@ -273,7 +283,7 @@ NTSTATUS context_from_server( CONTEXT *to, const context_t *from )
/* Restore normal registers */ /* Restore normal registers */
C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9); C(0); C(1); C(2); C(3); C(4); C(5); C(6); C(7); C(8); C(9);
C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19); C(10); C(11); C(12); C(13); C(14); C(15); C(16); C(17); C(18); C(19);
C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28); C(29); C(30); C(20); C(21); C(22); C(23); C(24); C(25); C(26); C(27); C(28);
#undef C #undef C
} }
return STATUS_SUCCESS; return STATUS_SUCCESS;

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@ -457,6 +457,25 @@ enum CV_HREG_e
CV_ARM_ND0 = 300, /* this includes ND1 to ND31 */ CV_ARM_ND0 = 300, /* this includes ND1 to ND31 */
CV_ARM_NQ0 = 400, /* this includes NQ1 to NQ15 */ CV_ARM_NQ0 = 400, /* this includes NQ1 to NQ15 */
/* ARM64 CPU */
CV_ARM64_NOREG = CV_REG_NONE,
CV_ARM64_W0 = 10, /* this includes W0 to W30 */
CV_ARM64_WZR = 41,
CV_ARM64_PC = 42, /* Wine extension */
CV_ARM64_PSTATE = 43, /* Wine extension */
CV_ARM64_X0 = 50, /* this includes X0 to X28 */
CV_ARM64_IP0 = 66, /* Same as X16 */
CV_ARM64_IP1 = 67, /* Same as X17 */
CV_ARM64_FP = 79,
CV_ARM64_LR = 80,
CV_ARM64_SP = 81,
CV_ARM64_ZR = 82,
CV_ARM64_NZCV = 90,
CV_ARM64_S0 = 100, /* this includes S0 to S31 */
CV_ARM64_D0 = 140, /* this includes D0 to D31 */
CV_ARM64_Q0 = 180, /* this includes Q0 to Q31 */
CV_ARM64_FPSR = 220,
/* Intel IA64 CPU */ /* Intel IA64 CPU */
CV_IA64_NOREG = CV_REG_NONE, CV_IA64_NOREG = CV_REG_NONE,
CV_IA64_Br0 = 512, /* this includes Br1 to Br7 */ CV_IA64_Br0 = 512, /* this includes Br1 to Br7 */
@ -664,13 +683,6 @@ enum CV_HREG_e
CV_AMD64_R13 = 341, CV_AMD64_R13 = 341,
CV_AMD64_R14 = 342, CV_AMD64_R14 = 342,
CV_AMD64_R15 = 343, CV_AMD64_R15 = 343,
/* Wine extension */
CV_ARM64_NOREG = CV_REG_NONE,
CV_ARM64_X0 = 10, /* this includes X0 to X30 */
CV_ARM64_SP = 41,
CV_ARM64_PC = 42,
CV_ARM64_PSTATE = 43,
}; };
typedef enum typedef enum

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@ -1740,7 +1740,7 @@ PRUNTIME_FUNCTION WINAPI RtlLookupFunctionEntry(ULONG_PTR,DWORD*,UNWIND_HISTORY_
* *
*/ */
#define CONTEXT_ARM64 0x2000000 #define CONTEXT_ARM64 0x400000
#define CONTEXT_CONTROL (CONTEXT_ARM64 | 0x00000001) #define CONTEXT_CONTROL (CONTEXT_ARM64 | 0x00000001)
#define CONTEXT_INTEGER (CONTEXT_ARM64 | 0x00000002) #define CONTEXT_INTEGER (CONTEXT_ARM64 | 0x00000002)
#define CONTEXT_FLOATING_POINT (CONTEXT_ARM64 | 0x00000004) #define CONTEXT_FLOATING_POINT (CONTEXT_ARM64 | 0x00000004)
@ -1786,10 +1786,10 @@ typedef struct _CONTEXT {
ULONGLONG X26; ULONGLONG X26;
ULONGLONG X27; ULONGLONG X27;
ULONGLONG X28; ULONGLONG X28;
ULONGLONG X29;
ULONGLONG X30;
/* These are selected by CONTEXT_CONTROL */ /* These are selected by CONTEXT_CONTROL */
ULONGLONG Fp;
ULONGLONG Lr;
ULONGLONG Sp; ULONGLONG Sp;
ULONGLONG Pc; ULONGLONG Pc;
ULONGLONG PState; ULONGLONG PState;

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@ -32,7 +32,7 @@ static BOOL be_arm64_get_addr(HANDLE hThread, const CONTEXT* ctx,
case be_cpu_addr_stack: case be_cpu_addr_stack:
return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->Sp); return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->Sp);
case be_cpu_addr_frame: case be_cpu_addr_frame:
return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->X29); return be_cpu_build_addr(hThread, ctx, addr, 0, ctx->Fp);
break; break;
} }
return FALSE; return FALSE;
@ -44,7 +44,7 @@ static BOOL be_arm64_get_register_info(int regno, enum be_cpu_addr* kind)
{ {
case CV_ARM64_PC: *kind = be_cpu_addr_pc; return TRUE; case CV_ARM64_PC: *kind = be_cpu_addr_pc; return TRUE;
case CV_ARM64_SP: *kind = be_cpu_addr_stack; return TRUE; case CV_ARM64_SP: *kind = be_cpu_addr_stack; return TRUE;
case CV_ARM64_X0 + 29: *kind = be_cpu_addr_frame; return TRUE; case CV_ARM64_FP: *kind = be_cpu_addr_frame; return TRUE;
} }
return FALSE; return FALSE;
} }
@ -80,21 +80,20 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r
if (!((ctx->PState >> 26) & (1 << (sizeof(condflags) - i)))) if (!((ctx->PState >> 26) & (1 << (sizeof(condflags) - i))))
buf[i] = '-'; buf[i] = '-';
dbg_printf(" Pc:%016lx Sp:%016lx Pstate:%016lx(%s)\n", dbg_printf(" Pc:%016lx Sp:%016lx Lr:%016lx Pstate:%016lx(%s)\n",
ctx->Pc, ctx->Sp, ctx->PState, buf); ctx->Pc, ctx->Sp, ctx->Lr, ctx->PState, buf);
dbg_printf(" x0: %016lx x1: %016lx x2: %016lx x3: %016lx x4: %016lx\n", dbg_printf(" x0: %016lx x1: %016lx x2: %016lx x3: %016lx x4: %016lx\n",
ctx->X0, ctx->X1, ctx->X2, ctx->X3, ctx->X4); ctx->X0, ctx->X1, ctx->X2, ctx->X3, ctx->X4);
dbg_printf(" x5: %016lx x6: %016lx x7: %016lx x8: %016lx x9: %016lx\n", dbg_printf(" x5: %016lx x6: %016lx x7: %016lx x8: %016lx x9: %016lx\n",
ctx->X5, ctx->X6, ctx->X7, ctx->X8, ctx->X9); ctx->X5, ctx->X6, ctx->X7, ctx->X8, ctx->X9);
dbg_printf(" x10:%016lx x11:%016lx x12:%016lx x13:%016lx x14:%016lx\n", dbg_printf(" x10:%016lx x11:%016lx x12:%016lx x13:%016lx x14:%016lx\n",
ctx->X10, ctx->X11, ctx->X12, ctx->X13, ctx->X14); ctx->X10, ctx->X11, ctx->X12, ctx->X13, ctx->X14);
dbg_printf(" x15:%016lx x16:%016lx x17:%016lx x18:%016lx x19:%016lx\n", dbg_printf(" x15:%016lx ip0:%016lx ip1:%016lx x18:%016lx x19:%016lx\n",
ctx->X15, ctx->X16, ctx->X17, ctx->X18, ctx->X19); ctx->X15, ctx->X16, ctx->X17, ctx->X18, ctx->X19);
dbg_printf(" x20:%016lx x21:%016lx x22:%016lx x23:%016lx x24:%016lx\n", dbg_printf(" x20:%016lx x21:%016lx x22:%016lx x23:%016lx x24:%016lx\n",
ctx->X20, ctx->X21, ctx->X22, ctx->X23, ctx->X24); ctx->X20, ctx->X21, ctx->X22, ctx->X23, ctx->X24);
dbg_printf(" x25:%016lx x26:%016lx x27:%016lx x28:%016lx x29:%016lx\n", dbg_printf(" x25:%016lx x26:%016lx x27:%016lx x28:%016lx Fp:%016lx\n",
ctx->X25, ctx->X26, ctx->X27, ctx->X28, ctx->X29); ctx->X25, ctx->X26, ctx->X27, ctx->X28, ctx->Fp);
dbg_printf(" x30:%016lx\n", ctx->X30);
if (all_regs) dbg_printf( "Floating point ARM64 dump not implemented\n" ); if (all_regs) dbg_printf( "Floating point ARM64 dump not implemented\n" );
} }
@ -134,8 +133,8 @@ static struct dbg_internal_var be_arm64_ctx[] =
{CV_ARM64_X0 + 26, "x26", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X26), dbg_itype_unsigned_long_int}, {CV_ARM64_X0 + 26, "x26", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X26), dbg_itype_unsigned_long_int},
{CV_ARM64_X0 + 27, "x27", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X27), dbg_itype_unsigned_long_int}, {CV_ARM64_X0 + 27, "x27", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X27), dbg_itype_unsigned_long_int},
{CV_ARM64_X0 + 28, "x28", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X28), dbg_itype_unsigned_long_int}, {CV_ARM64_X0 + 28, "x28", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X28), dbg_itype_unsigned_long_int},
{CV_ARM64_X0 + 29, "x29", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X29), dbg_itype_unsigned_long_int}, {CV_ARM64_FP, "fp", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Fp), dbg_itype_unsigned_long_int},
{CV_ARM64_X0 + 30, "x30", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X30), dbg_itype_unsigned_long_int}, {CV_ARM64_LR, "lr", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Lr), dbg_itype_unsigned_long_int},
{CV_ARM64_SP, "sp", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Sp), dbg_itype_unsigned_long_int}, {CV_ARM64_SP, "sp", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Sp), dbg_itype_unsigned_long_int},
{CV_ARM64_PC, "pc", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Pc), dbg_itype_unsigned_long_int}, {CV_ARM64_PC, "pc", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Pc), dbg_itype_unsigned_long_int},
{CV_ARM64_PSTATE, "pstate", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, PState), dbg_itype_unsigned_long_int}, {CV_ARM64_PSTATE, "pstate", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, PState), dbg_itype_unsigned_long_int},

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@ -428,8 +428,8 @@ static struct cpu_register cpu_register_map[] = {
REG(X26, 8, CONTEXT_INTEGER), REG(X26, 8, CONTEXT_INTEGER),
REG(X27, 8, CONTEXT_INTEGER), REG(X27, 8, CONTEXT_INTEGER),
REG(X28, 8, CONTEXT_INTEGER), REG(X28, 8, CONTEXT_INTEGER),
REG(X29, 8, CONTEXT_INTEGER), REG(Fp, 8, CONTEXT_INTEGER),
REG(X30, 8, CONTEXT_INTEGER), REG(Lr, 8, CONTEXT_INTEGER),
REG(Sp, 8, CONTEXT_CONTROL), REG(Sp, 8, CONTEXT_CONTROL),
REG(Pc, 8, CONTEXT_CONTROL), REG(Pc, 8, CONTEXT_CONTROL),
REG(PState, 8, CONTEXT_CONTROL), REG(PState, 8, CONTEXT_CONTROL),