msvcrt: Implement fesetenv for arm.
Signed-off-by: Martin Storsjö <martin@martin.st> Signed-off-by: Piotr Caban <piotr@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -5731,7 +5731,7 @@ static __msvcrt_ulong fenv_encode(unsigned int x, unsigned int y)
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return x | y;
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}
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#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
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#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || (defined(__arm__) && !defined(__SOFTFP__))
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static BOOL fenv_decode(__msvcrt_ulong enc, unsigned int *x, unsigned int *y)
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{
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if (enc & 0x20)
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@ -6069,6 +6069,32 @@ int CDECL fesetenv(const fenv_t *env)
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__asm__ __volatile__( "msr fpsr, %0" :: "r" (fpsr) );
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_control87(fp_cw, 0xffffffff);
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return 0;
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#elif defined(__arm__) && !defined(__SOFTFP__)
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DWORD fpscr;
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unsigned int tmp, fp_cw, fp_stat;
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if (!env->_Fe_ctl && !env->_Fe_stat) {
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_fpreset();
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return 0;
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}
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if (!fenv_decode(env->_Fe_ctl, &tmp, &fp_cw))
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return 1;
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if (!fenv_decode(env->_Fe_stat, &tmp, &fp_stat))
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return 1;
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_control87(_MCW_EM, _MCW_EM);
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__asm__ __volatile__( "vmrs %0, fpscr" : "=r" (fpscr) );
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fpscr &= ~0x9f;
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if (fp_stat & _SW_INVALID) fpscr |= 0x1;
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if (fp_stat & _SW_ZERODIVIDE) fpscr |= 0x2;
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if (fp_stat & _SW_OVERFLOW) fpscr |= 0x4;
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if (fp_stat & _SW_UNDERFLOW) fpscr |= 0x8;
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if (fp_stat & _SW_INEXACT) fpscr |= 0x10;
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if (fp_stat & _SW_DENORMAL) fpscr |= 0x80;
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__asm__ __volatile__( "vmsr fpscr, %0" :: "r" (fpscr) );
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_control87(fp_cw, 0xffffffff);
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return 0;
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#else
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FIXME( "not implemented\n" );
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#endif
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