d3dx9: Allow modifiers on the ps dcl input instruction.
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57408882b6
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7de630ef2f
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@ -110,16 +110,24 @@ static void asmparser_dcl_output(struct asm_parser *This, DWORD usage, DWORD num
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asmparser_message(This, "Line %u: Output register declared in a pixel shader\n", This->line_no);
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set_parse_status(This, PARSE_ERR);
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}
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if(!record_declaration(This->shader, usage, num, TRUE, reg->regnum, reg->writemask)) {
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if(!record_declaration(This->shader, usage, num, 0, TRUE, reg->regnum, reg->writemask)) {
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ERR("Out of memory\n");
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set_parse_status(This, PARSE_ERR);
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}
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}
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static void asmparser_dcl_input(struct asm_parser *This, DWORD usage, DWORD num,
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const struct shader_reg *reg) {
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DWORD mod, const struct shader_reg *reg) {
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if(!This->shader) return;
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if(!record_declaration(This->shader, usage, num, FALSE, reg->regnum, reg->writemask)) {
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if(mod != 0 &&
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(This->shader->version != BWRITERPS_VERSION(3, 0) ||
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(mod != BWRITERSPDM_MSAMPCENTROID &&
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mod != BWRITERSPDM_PARTIALPRECISION))) {
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asmparser_message(This, "Line %u: Unsupported modifier in dcl instruction\n", This->line_no);
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set_parse_status(This, PARSE_ERR);
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return;
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}
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if(!record_declaration(This->shader, usage, num, mod, FALSE, reg->regnum, reg->writemask)) {
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ERR("Out of memory\n");
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set_parse_status(This, PARSE_ERR);
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}
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@ -842,34 +850,34 @@ static const struct asmparser_backend parser_ps_3 = {
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};
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static void gen_oldvs_output(struct bwriter_shader *shader) {
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record_declaration(shader, BWRITERDECLUSAGE_POSITION, 0, TRUE, OPOS_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 0, TRUE, OT0_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 1, TRUE, OT1_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 2, TRUE, OT2_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 3, TRUE, OT3_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 4, TRUE, OT4_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 5, TRUE, OT5_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 6, TRUE, OT6_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 7, TRUE, OT7_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_FOG, 0, TRUE, OFOG_REG, OFOG_WRITEMASK);
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record_declaration(shader, BWRITERDECLUSAGE_PSIZE, 0, TRUE, OPTS_REG, OPTS_WRITEMASK);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 0, TRUE, OD0_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 1, TRUE, OD1_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_POSITION, 0, 0, TRUE, OPOS_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 0, 0, TRUE, OT0_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 1, 0, TRUE, OT1_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 2, 0, TRUE, OT2_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 3, 0, TRUE, OT3_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 4, 0, TRUE, OT4_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 5, 0, TRUE, OT5_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 6, 0, TRUE, OT6_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 7, 0, TRUE, OT7_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_FOG, 0, 0, TRUE, OFOG_REG, OFOG_WRITEMASK);
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record_declaration(shader, BWRITERDECLUSAGE_PSIZE, 0, 0, TRUE, OPTS_REG, OPTS_WRITEMASK);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 0, 0, TRUE, OD0_REG, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 1, 0, TRUE, OD1_REG, BWRITERSP_WRITEMASK_ALL);
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}
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static void gen_oldps_input(struct bwriter_shader *shader, DWORD texcoords) {
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switch(texcoords) {
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case 8: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 7, FALSE, T7_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 7: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 6, FALSE, T6_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 6: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 5, FALSE, T5_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 5: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 4, FALSE, T4_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 4: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 3, FALSE, T3_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 3: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 2, FALSE, T2_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 2: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 1, FALSE, T1_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 1: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 0, FALSE, T0_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 8: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 7, 0, FALSE, T7_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 7: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 6, 0, FALSE, T6_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 6: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 5, 0, FALSE, T5_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 5: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 4, 0, FALSE, T4_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 4: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 3, 0, FALSE, T3_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 3: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 2, 0, FALSE, T2_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 2: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 1, 0, FALSE, T1_VARYING, BWRITERSP_WRITEMASK_ALL);
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case 1: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 0, 0, FALSE, T0_VARYING, BWRITERSP_WRITEMASK_ALL);
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};
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 0, FALSE, C0_VARYING, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 1, FALSE, C1_VARYING, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 0, 0, FALSE, C0_VARYING, BWRITERSP_WRITEMASK_ALL);
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record_declaration(shader, BWRITERDECLUSAGE_COLOR, 1, 0, FALSE, C1_VARYING, BWRITERSP_WRITEMASK_ALL);
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}
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void create_vs10_parser(struct asm_parser *ret) {
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@ -539,29 +539,39 @@ instruction: INSTR_ADD omods dreg ',' sregs
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reg.writemask = $4;
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asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, ®);
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}
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| INSTR_DCL dclusage REG_INPUT
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| INSTR_DCL dclusage omods REG_INPUT
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{
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struct shader_reg reg;
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TRACE("Input reg declaration\n");
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if($3.shift != 0) {
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asmparser_message(&asm_ctx, "Line %u: Shift modifier not allowed here\n",
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asm_ctx.line_no);
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set_parse_status(&asm_ctx, PARSE_ERR);
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}
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ZeroMemory(®, sizeof(reg));
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reg.type = BWRITERSPR_INPUT;
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reg.regnum = $3;
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reg.regnum = $4;
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reg.rel_reg = NULL;
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reg.srcmod = 0;
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reg.writemask = BWRITERSP_WRITEMASK_ALL;
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asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, ®);
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asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, ®);
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}
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| INSTR_DCL dclusage REG_INPUT writemask
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| INSTR_DCL dclusage omods REG_INPUT writemask
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{
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struct shader_reg reg;
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TRACE("Input reg declaration\n");
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if($3.shift != 0) {
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asmparser_message(&asm_ctx, "Line %u: Shift modifier not allowed here\n",
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asm_ctx.line_no);
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set_parse_status(&asm_ctx, PARSE_ERR);
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}
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ZeroMemory(®, sizeof(reg));
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reg.type = BWRITERSPR_INPUT;
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reg.regnum = $3;
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reg.regnum = $4;
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reg.rel_reg = NULL;
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reg.srcmod = 0;
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reg.writemask = $4;
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asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, ®);
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reg.writemask = $5;
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asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, ®);
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}
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| INSTR_DCL sampdcl REG_SAMPLER
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{
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@ -209,7 +209,7 @@ BOOL add_constB(struct bwriter_shader *shader, DWORD reg, BOOL x) {
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return TRUE;
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}
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BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, DWORD usage_idx, BOOL output, DWORD regnum, DWORD writemask) {
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BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, DWORD usage_idx, DWORD mod, BOOL output, DWORD regnum, DWORD writemask) {
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unsigned int *num;
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struct declaration **decl;
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unsigned int i;
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@ -250,6 +250,7 @@ BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, DWORD usage_
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(*decl)[*num].usage = usage;
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(*decl)[*num].usage_idx = usage_idx;
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(*decl)[*num].regnum = regnum;
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(*decl)[*num].mod = mod;
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(*decl)[*num].writemask = writemask;
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(*num)++;
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@ -363,6 +364,7 @@ static void write_declarations(struct bytecode_buffer *buffer, BOOL len,
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token |= (type << D3DSP_REGTYPE_SHIFT) & D3DSP_REGTYPE_MASK;
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token |= (d3d9_writemask(decls[i].writemask)) & D3DSP_WRITEMASK_ALL;
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token |= decls[i].regnum & D3DSP_REGNUM_MASK;
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token |= d3d9_dstmod(decls[i].mod);
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put_dword(buffer, token);
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}
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}
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@ -184,6 +184,7 @@ struct instruction {
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struct declaration {
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DWORD usage, usage_idx;
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DWORD regnum;
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DWORD mod;
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DWORD writemask;
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};
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@ -270,7 +271,7 @@ struct asmparser_backend {
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void (*dcl_output)(struct asm_parser *This, DWORD usage, DWORD num,
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const struct shader_reg *reg);
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void (*dcl_input)(struct asm_parser *This, DWORD usage, DWORD num,
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const struct shader_reg *reg);
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DWORD mod, const struct shader_reg *reg);
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void (*dcl_sampler)(struct asm_parser *This, DWORD samptype, DWORD regnum,
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unsigned int line_no);
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@ -286,7 +287,7 @@ BOOL add_instruction(struct bwriter_shader *shader, struct instruction *instr);
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BOOL add_constF(struct bwriter_shader *shader, DWORD reg, float x, float y, float z, float w);
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BOOL add_constI(struct bwriter_shader *shader, DWORD reg, INT x, INT y, INT z, INT w);
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BOOL add_constB(struct bwriter_shader *shader, DWORD reg, BOOL x);
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BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, DWORD usage_idx, BOOL output, DWORD regnum, DWORD writemask);
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BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, DWORD usage_idx, DWORD mod, BOOL output, DWORD regnum, DWORD writemask);
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BOOL record_sampler(struct bwriter_shader *shader, DWORD samptype, DWORD regnum);
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#define MESSAGEBUFFER_INITIAL_SIZE 256
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@ -1180,6 +1180,11 @@ static void ps_3_0_test(void) {
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"add oC3, r0, r1\n",
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{0xffff0300, 0x03000002, 0x800f0803, 0x80e40000, 0x80e40001, 0x0000ffff}
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},
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{ /* shader 12 */
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"ps_3_0\n"
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"dcl_texcoord0_centroid v0\n",
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{0xffff0300, 0x0200001f, 0x80000005, 0x904f0000, 0x0000ffff}
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},
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};
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exec_tests("ps_3_0", tests, sizeof(tests) / sizeof(tests[0]));
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@ -1309,6 +1314,15 @@ static void failure_test(void) {
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/* shader 38: only a0.x accepted in vs_1_1 */
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"vs_1_1\n"
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"mov r0, c0[ a0 ]\n",
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/* shader 39: invalid modifier for dcl instruction */
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"ps_3_0\n"
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"dcl_texcoord0_sat v0\n",
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/* shader 40: shift not allowed */
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"ps_3_0\n"
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"dcl_texcoord0_x2 v0\n",
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/* shader 41: no modifier allowed with dcl instruction in vs */
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"vs_3_0\n"
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"dcl_texcoord0_centroid v0\n",
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};
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HRESULT hr;
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unsigned int i;
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