wined3d: Get rid of the remaining WINED3DSP_REGNUM_MASK usage.
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6eb43e35c9
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@ -724,21 +724,24 @@ HRESULT shader_get_registers_used(IWineD3DBaseShader *iface, struct shader_reg_m
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else if (ins.handler_idx == WINED3DSIH_LOOP
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else if (ins.handler_idx == WINED3DSIH_LOOP
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|| ins.handler_idx == WINED3DSIH_REP)
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|| ins.handler_idx == WINED3DSIH_REP)
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{
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{
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DWORD reg;
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struct wined3d_shader_src_param src, rel_addr;
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if(ins.handler_idx == WINED3DSIH_LOOP) {
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shader_sm1_read_src_param(&pToken, &src, &rel_addr, shader_version);
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reg = pToken[1];
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} else {
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/* Rep and Loop always use an integer constant for the control parameters */
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reg = pToken[0];
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if (ins.handler_idx == WINED3DSIH_REP)
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{
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reg_maps->integer_constants |= 1 << src.register_idx;
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}
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else
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{
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shader_sm1_read_src_param(&pToken, &src, &rel_addr, shader_version);
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reg_maps->integer_constants |= 1 << src.register_idx;
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}
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}
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cur_loop_depth++;
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cur_loop_depth++;
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if(cur_loop_depth > max_loop_depth)
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if(cur_loop_depth > max_loop_depth)
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max_loop_depth = cur_loop_depth;
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max_loop_depth = cur_loop_depth;
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pToken += param_size;
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/* Rep and Loop always use an integer constant for the control parameters */
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reg_maps->integer_constants |= (1 << (reg & WINED3DSP_REGNUM_MASK));
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}
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}
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else if (ins.handler_idx == WINED3DSIH_ENDLOOP
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else if (ins.handler_idx == WINED3DSIH_ENDLOOP
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|| ins.handler_idx == WINED3DSIH_ENDREP)
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|| ins.handler_idx == WINED3DSIH_ENDREP)
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@ -748,62 +751,16 @@ HRESULT shader_get_registers_used(IWineD3DBaseShader *iface, struct shader_reg_m
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/* For subroutine prototypes */
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/* For subroutine prototypes */
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else if (ins.handler_idx == WINED3DSIH_LABEL)
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else if (ins.handler_idx == WINED3DSIH_LABEL)
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{
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{
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struct wined3d_shader_src_param src, rel_addr;
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DWORD snum = *pToken & WINED3DSP_REGNUM_MASK;
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shader_sm1_read_src_param(&pToken, &src, &rel_addr, shader_version);
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reg_maps->labels[snum] = 1;
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reg_maps->labels[src.register_idx] = 1;
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pToken += param_size;
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}
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}
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/* Set texture, address, temporary registers */
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/* Set texture, address, temporary registers */
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else
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else
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{
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{
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int i, limit;
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int i, limit;
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/* Declare 1.X samplers implicitly, based on the destination reg. number */
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if (WINED3DSHADER_VERSION_MAJOR(shader_version) == 1
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&& pshader /* Filter different instructions with the same enum values in VS */
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&& (ins.handler_idx == WINED3DSIH_TEX
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|| ins.handler_idx == WINED3DSIH_TEXBEM
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|| ins.handler_idx == WINED3DSIH_TEXBEML
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|| ins.handler_idx == WINED3DSIH_TEXDP3TEX
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|| ins.handler_idx == WINED3DSIH_TEXM3x2TEX
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|| ins.handler_idx == WINED3DSIH_TEXM3x3SPEC
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|| ins.handler_idx == WINED3DSIH_TEXM3x3TEX
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|| ins.handler_idx == WINED3DSIH_TEXM3x3VSPEC
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|| ins.handler_idx == WINED3DSIH_TEXREG2AR
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|| ins.handler_idx == WINED3DSIH_TEXREG2GB
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|| ins.handler_idx == WINED3DSIH_TEXREG2RGB))
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{
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/* Fake sampler usage, only set reserved bit and ttype */
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DWORD sampler_code = *pToken & WINED3DSP_REGNUM_MASK;
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TRACE("Setting fake 2D sampler for 1.x pixelshader\n");
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reg_maps->sampler_type[sampler_code] = WINED3DSTT_2D;
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/* texbem is only valid with < 1.4 pixel shaders */
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if (ins.handler_idx == WINED3DSIH_TEXBEM
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|| ins.handler_idx == WINED3DSIH_TEXBEML)
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{
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reg_maps->bumpmat[sampler_code] = TRUE;
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if (ins.handler_idx == WINED3DSIH_TEXBEML)
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{
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reg_maps->luminanceparams[sampler_code] = TRUE;
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}
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}
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}
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if (ins.handler_idx == WINED3DSIH_NRM)
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{
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reg_maps->usesnrm = 1;
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}
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else if (pshader && ins.handler_idx == WINED3DSIH_BEM)
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{
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DWORD regnum = *pToken & WINED3DSP_REGNUM_MASK;
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reg_maps->bumpmat[regnum] = TRUE;
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}
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else if (ins.handler_idx == WINED3DSIH_DSY)
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{
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reg_maps->usesdsy = 1;
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}
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/* This will loop over all the registers and try to
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/* This will loop over all the registers and try to
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* make a bitmask of the ones we're interested in.
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* make a bitmask of the ones we're interested in.
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*
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*
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@ -831,6 +788,52 @@ HRESULT shader_get_registers_used(IWineD3DBaseShader *iface, struct shader_reg_m
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shader_record_register_usage(This, reg_maps, dst_param.register_type,
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shader_record_register_usage(This, reg_maps, dst_param.register_type,
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dst_param.register_idx, !!dst_param.rel_addr, pshader);
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dst_param.register_idx, !!dst_param.rel_addr, pshader);
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}
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}
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/* Declare 1.X samplers implicitly, based on the destination reg. number */
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if (WINED3DSHADER_VERSION_MAJOR(shader_version) == 1
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&& pshader /* Filter different instructions with the same enum values in VS */
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&& (ins.handler_idx == WINED3DSIH_TEX
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|| ins.handler_idx == WINED3DSIH_TEXBEM
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|| ins.handler_idx == WINED3DSIH_TEXBEML
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|| ins.handler_idx == WINED3DSIH_TEXDP3TEX
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|| ins.handler_idx == WINED3DSIH_TEXM3x2TEX
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|| ins.handler_idx == WINED3DSIH_TEXM3x3SPEC
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|| ins.handler_idx == WINED3DSIH_TEXM3x3TEX
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|| ins.handler_idx == WINED3DSIH_TEXM3x3VSPEC
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|| ins.handler_idx == WINED3DSIH_TEXREG2AR
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|| ins.handler_idx == WINED3DSIH_TEXREG2GB
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|| ins.handler_idx == WINED3DSIH_TEXREG2RGB))
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{
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/* Fake sampler usage, only set reserved bit and ttype */
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DWORD sampler_code = dst_param.register_idx;
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TRACE("Setting fake 2D sampler for 1.x pixelshader\n");
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reg_maps->sampler_type[sampler_code] = WINED3DSTT_2D;
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/* texbem is only valid with < 1.4 pixel shaders */
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if (ins.handler_idx == WINED3DSIH_TEXBEM
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|| ins.handler_idx == WINED3DSIH_TEXBEML)
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{
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reg_maps->bumpmat[sampler_code] = TRUE;
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if (ins.handler_idx == WINED3DSIH_TEXBEML)
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{
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reg_maps->luminanceparams[sampler_code] = TRUE;
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}
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}
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}
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else if (pshader && ins.handler_idx == WINED3DSIH_BEM)
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{
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reg_maps->bumpmat[dst_param.register_idx] = TRUE;
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}
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}
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if (ins.handler_idx == WINED3DSIH_NRM)
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{
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reg_maps->usesnrm = 1;
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}
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else if (ins.handler_idx == WINED3DSIH_DSY)
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{
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reg_maps->usesdsy = 1;
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}
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}
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limit = ins.src_count + (ins.predicate ? 1 : 0);
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limit = ins.src_count + (ins.predicate ? 1 : 0);
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