d3d10: Implement D3D10StateBlockMaskDisableCapture().
This commit is contained in:
parent
88a55a04a3
commit
5ffa2aba23
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@ -21,7 +21,7 @@
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@ stub D3D10RegisterLayers
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@ stub D3D10RegisterLayers
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@ stdcall D3D10StateBlockMaskDifference(ptr ptr ptr)
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@ stdcall D3D10StateBlockMaskDifference(ptr ptr ptr)
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@ stdcall D3D10StateBlockMaskDisableAll(ptr)
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@ stdcall D3D10StateBlockMaskDisableAll(ptr)
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@ stub D3D10StateBlockMaskDisableCapture
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@ stdcall D3D10StateBlockMaskDisableCapture(ptr long long long)
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@ stub D3D10StateBlockMaskEnableAll
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@ stub D3D10StateBlockMaskEnableAll
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@ stub D3D10StateBlockMaskEnableCapture
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@ stub D3D10StateBlockMaskEnableCapture
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@ stub D3D10StateBlockMaskGetSetting
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@ stub D3D10StateBlockMaskGetSetting
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@ -41,6 +41,7 @@
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const char *debug_d3d10_driver_type(D3D10_DRIVER_TYPE driver_type) DECLSPEC_HIDDEN;
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const char *debug_d3d10_driver_type(D3D10_DRIVER_TYPE driver_type) DECLSPEC_HIDDEN;
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const char *debug_d3d10_shader_variable_class(D3D10_SHADER_VARIABLE_CLASS c) DECLSPEC_HIDDEN;
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const char *debug_d3d10_shader_variable_class(D3D10_SHADER_VARIABLE_CLASS c) DECLSPEC_HIDDEN;
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const char *debug_d3d10_shader_variable_type(D3D10_SHADER_VARIABLE_TYPE t) DECLSPEC_HIDDEN;
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const char *debug_d3d10_shader_variable_type(D3D10_SHADER_VARIABLE_TYPE t) DECLSPEC_HIDDEN;
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const char *debug_d3d10_device_state_types(D3D10_DEVICE_STATE_TYPES t) DECLSPEC_HIDDEN;
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void *d3d10_rb_alloc(size_t size) DECLSPEC_HIDDEN;
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void *d3d10_rb_alloc(size_t size) DECLSPEC_HIDDEN;
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void *d3d10_rb_realloc(void *ptr, size_t size) DECLSPEC_HIDDEN;
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void *d3d10_rb_realloc(void *ptr, size_t size) DECLSPEC_HIDDEN;
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@ -144,6 +144,37 @@ HRESULT WINAPI D3D10CreateStateBlock(ID3D10Device *device,
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return S_OK;
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return S_OK;
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}
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}
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static HRESULT stateblock_mask_clear_bits(BYTE *field, UINT field_size, UINT start_bit, UINT count)
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{
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UINT end_bit = start_bit + count;
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BYTE start_mask = 0x7f >> (~start_bit & 7);
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BYTE end_mask = 0xff << (end_bit & 7);
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UINT start_idx = start_bit >> 3;
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UINT end_idx = end_bit >> 3;
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if (start_bit >= field_size || field_size - start_bit < count)
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return E_INVALIDARG;
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if (start_idx == end_idx)
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{
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field[start_idx] &= start_mask | end_mask;
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return S_OK;
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}
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if (start_bit & 7)
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{
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field[start_idx] &= start_mask;
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++start_idx;
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}
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memset(&field[start_idx], 0, end_idx - start_idx);
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if (end_bit & 7)
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field[end_idx] &= end_mask;
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return S_OK;
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}
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HRESULT WINAPI D3D10StateBlockMaskDifference(D3D10_STATE_BLOCK_MASK *mask_x,
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HRESULT WINAPI D3D10StateBlockMaskDifference(D3D10_STATE_BLOCK_MASK *mask_x,
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D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result)
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D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result)
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{
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{
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@ -178,3 +209,78 @@ HRESULT WINAPI D3D10StateBlockMaskDisableAll(D3D10_STATE_BLOCK_MASK *mask)
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return S_OK;
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return S_OK;
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}
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}
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HRESULT WINAPI D3D10StateBlockMaskDisableCapture(D3D10_STATE_BLOCK_MASK *mask,
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D3D10_DEVICE_STATE_TYPES state_type, UINT start_idx, UINT count)
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{
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TRACE("mask %p state_type %s, start_idx %u, count %u.\n",
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mask, debug_d3d10_device_state_types(state_type), start_idx, count);
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if (!mask)
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return E_INVALIDARG;
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switch (state_type)
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{
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case D3D10_DST_SO_BUFFERS:
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return stateblock_mask_clear_bits(&mask->SOBuffers, 1, start_idx, count);
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case D3D10_DST_OM_RENDER_TARGETS:
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return stateblock_mask_clear_bits(&mask->OMRenderTargets, 1, start_idx, count);
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case D3D10_DST_DEPTH_STENCIL_STATE:
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return stateblock_mask_clear_bits(&mask->OMDepthStencilState, 1, start_idx, count);
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case D3D10_DST_BLEND_STATE:
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return stateblock_mask_clear_bits(&mask->OMBlendState, 1, start_idx, count);
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case D3D10_DST_VS:
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return stateblock_mask_clear_bits(&mask->VS, 1, start_idx, count);
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case D3D10_DST_VS_SAMPLERS:
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return stateblock_mask_clear_bits(mask->VSSamplers,
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D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
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case D3D10_DST_VS_SHADER_RESOURCES:
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return stateblock_mask_clear_bits(mask->VSShaderResources,
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D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
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case D3D10_DST_VS_CONSTANT_BUFFERS:
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return stateblock_mask_clear_bits(mask->VSConstantBuffers,
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D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
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case D3D10_DST_GS:
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return stateblock_mask_clear_bits(&mask->GS, 1, start_idx, count);
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case D3D10_DST_GS_SAMPLERS:
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return stateblock_mask_clear_bits(mask->GSSamplers,
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D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
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case D3D10_DST_GS_SHADER_RESOURCES:
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return stateblock_mask_clear_bits(mask->GSShaderResources,
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D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
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case D3D10_DST_GS_CONSTANT_BUFFERS:
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return stateblock_mask_clear_bits(mask->GSConstantBuffers,
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D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
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case D3D10_DST_PS:
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return stateblock_mask_clear_bits(&mask->PS, 1, start_idx, count);
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case D3D10_DST_PS_SAMPLERS:
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return stateblock_mask_clear_bits(mask->PSSamplers,
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D3D10_COMMONSHADER_SAMPLER_SLOT_COUNT, start_idx, count);
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case D3D10_DST_PS_SHADER_RESOURCES:
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return stateblock_mask_clear_bits(mask->PSShaderResources,
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D3D10_COMMONSHADER_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
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case D3D10_DST_PS_CONSTANT_BUFFERS:
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return stateblock_mask_clear_bits(mask->PSConstantBuffers,
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D3D10_COMMONSHADER_CONSTANT_BUFFER_API_SLOT_COUNT, start_idx, count);
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case D3D10_DST_IA_VERTEX_BUFFERS:
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return stateblock_mask_clear_bits(mask->IAVertexBuffers,
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D3D10_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT, start_idx, count);
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case D3D10_DST_IA_INDEX_BUFFER:
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return stateblock_mask_clear_bits(&mask->IAIndexBuffer, 1, start_idx, count);
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case D3D10_DST_IA_INPUT_LAYOUT:
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return stateblock_mask_clear_bits(&mask->IAInputLayout, 1, start_idx, count);
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case D3D10_DST_IA_PRIMITIVE_TOPOLOGY:
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return stateblock_mask_clear_bits(&mask->IAPrimitiveTopology, 1, start_idx, count);
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case D3D10_DST_RS_VIEWPORTS:
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return stateblock_mask_clear_bits(&mask->RSViewports, 1, start_idx, count);
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case D3D10_DST_RS_SCISSOR_RECTS:
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return stateblock_mask_clear_bits(&mask->RSScissorRects, 1, start_idx, count);
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case D3D10_DST_RS_RASTERIZER_STATE:
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return stateblock_mask_clear_bits(&mask->RSRasterizerState, 1, start_idx, count);
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case D3D10_DST_PREDICATION:
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return stateblock_mask_clear_bits(&mask->Predication, 1, start_idx, count);
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default:
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FIXME("Unhandled state_type %#x.\n", state_type);
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return E_INVALIDARG;
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}
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}
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@ -66,8 +66,34 @@ static void test_device_interfaces(ID3D10Device *device)
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static void test_stateblock_mask(void)
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static void test_stateblock_mask(void)
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{
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{
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static const struct
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{
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UINT start_idx;
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UINT count;
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BYTE expected[5];
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}
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capture_test[] =
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{
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{ 8, 4, {0xff, 0xf0, 0xff, 0xff, 0xff}},
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{ 9, 4, {0xff, 0xe1, 0xff, 0xff, 0xff}},
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{10, 4, {0xff, 0xc3, 0xff, 0xff, 0xff}},
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{11, 4, {0xff, 0x87, 0xff, 0xff, 0xff}},
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{12, 4, {0xff, 0x0f, 0xff, 0xff, 0xff}},
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{13, 4, {0xff, 0x1f, 0xfe, 0xff, 0xff}},
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{14, 4, {0xff, 0x3f, 0xfc, 0xff, 0xff}},
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{15, 4, {0xff, 0x7f, 0xf8, 0xff, 0xff}},
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{ 8, 12, {0xff, 0x00, 0xf0, 0xff, 0xff}},
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{ 9, 12, {0xff, 0x01, 0xe0, 0xff, 0xff}},
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{10, 12, {0xff, 0x03, 0xc0, 0xff, 0xff}},
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{11, 12, {0xff, 0x07, 0x80, 0xff, 0xff}},
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{12, 12, {0xff, 0x0f, 0x00, 0xff, 0xff}},
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{13, 12, {0xff, 0x1f, 0x00, 0xfe, 0xff}},
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{14, 12, {0xff, 0x3f, 0x00, 0xfc, 0xff}},
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{15, 12, {0xff, 0x7f, 0x00, 0xf8, 0xff}},
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};
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D3D10_STATE_BLOCK_MASK mask_x, mask_y, result;
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D3D10_STATE_BLOCK_MASK mask_x, mask_y, result;
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HRESULT hr;
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HRESULT hr;
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UINT i;
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memset(&mask_x, 0, sizeof(mask_x));
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memset(&mask_x, 0, sizeof(mask_x));
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memset(&mask_y, 0, sizeof(mask_y));
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memset(&mask_y, 0, sizeof(mask_y));
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@ -96,6 +122,30 @@ static void test_stateblock_mask(void)
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ok(!result.Predication, "Got unexpected result.Predication %#x.\n", result.Predication);
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ok(!result.Predication, "Got unexpected result.Predication %#x.\n", result.Predication);
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hr = D3D10StateBlockMaskDisableAll(NULL);
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hr = D3D10StateBlockMaskDisableAll(NULL);
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ok(hr == E_INVALIDARG, "Got unexpect hr %#x.\n", hr);
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ok(hr == E_INVALIDARG, "Got unexpect hr %#x.\n", hr);
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result.VS = 0xff;
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hr = D3D10StateBlockMaskDisableCapture(&result, D3D10_DST_VS, 0, 1);
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ok(SUCCEEDED(hr), "D3D10StateBlockMaskDisableCapture failed, hr %#x.\n", hr);
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ok(result.VS == 0xfe, "Got unexpected result.VS %#x.\n", result.VS);
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hr = D3D10StateBlockMaskDisableCapture(&result, D3D10_DST_VS, 0, 4);
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ok(hr == E_INVALIDARG, "Got unexpect hr %#x.\n", hr);
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hr = D3D10StateBlockMaskDisableCapture(&result, D3D10_DST_VS, 1, 1);
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ok(hr == E_INVALIDARG, "Got unexpect hr %#x.\n", hr);
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hr = D3D10StateBlockMaskDisableCapture(NULL, D3D10_DST_VS, 0, 1);
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ok(hr == E_INVALIDARG, "Got unexpect hr %#x.\n", hr);
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for (i = 0; i < sizeof(capture_test) / sizeof(*capture_test); ++i)
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{
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memset(&result, 0xff, sizeof(result));
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hr = D3D10StateBlockMaskDisableCapture(&result, D3D10_DST_VS_SHADER_RESOURCES,
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capture_test[i].start_idx, capture_test[i].count);
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ok(SUCCEEDED(hr), "D3D10StateBlockMaskDisableCapture failed, hr %#x.\n", hr);
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ok(!memcmp(result.VSShaderResources, capture_test[i].expected, 5),
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"Got unexpect result.VSShaderResources[0..4] {%#x, %#x, %#x, %#x, %#x} for test %u.\n",
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result.VSShaderResources[0], result.VSShaderResources[1],
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result.VSShaderResources[2], result.VSShaderResources[3],
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result.VSShaderResources[4], i);
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}
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}
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}
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START_TEST(device)
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START_TEST(device)
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@ -95,6 +95,40 @@ const char *debug_d3d10_shader_variable_type(D3D10_SHADER_VARIABLE_TYPE t)
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}
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}
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}
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}
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const char *debug_d3d10_device_state_types(D3D10_DEVICE_STATE_TYPES t)
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{
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switch (t)
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{
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WINE_D3D10_TO_STR(D3D10_DST_SO_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_OM_RENDER_TARGETS);
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WINE_D3D10_TO_STR(D3D10_DST_DEPTH_STENCIL_STATE);
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WINE_D3D10_TO_STR(D3D10_DST_BLEND_STATE);
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WINE_D3D10_TO_STR(D3D10_DST_VS);
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WINE_D3D10_TO_STR(D3D10_DST_VS_SAMPLERS);
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WINE_D3D10_TO_STR(D3D10_DST_VS_SHADER_RESOURCES);
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WINE_D3D10_TO_STR(D3D10_DST_VS_CONSTANT_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_GS);
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WINE_D3D10_TO_STR(D3D10_DST_GS_SAMPLERS);
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WINE_D3D10_TO_STR(D3D10_DST_GS_SHADER_RESOURCES);
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WINE_D3D10_TO_STR(D3D10_DST_GS_CONSTANT_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_PS);
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WINE_D3D10_TO_STR(D3D10_DST_PS_SAMPLERS);
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WINE_D3D10_TO_STR(D3D10_DST_PS_SHADER_RESOURCES);
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WINE_D3D10_TO_STR(D3D10_DST_PS_CONSTANT_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_IA_VERTEX_BUFFERS);
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WINE_D3D10_TO_STR(D3D10_DST_IA_INDEX_BUFFER);
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WINE_D3D10_TO_STR(D3D10_DST_IA_INPUT_LAYOUT);
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WINE_D3D10_TO_STR(D3D10_DST_IA_PRIMITIVE_TOPOLOGY);
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WINE_D3D10_TO_STR(D3D10_DST_RS_VIEWPORTS);
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WINE_D3D10_TO_STR(D3D10_DST_RS_SCISSOR_RECTS);
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WINE_D3D10_TO_STR(D3D10_DST_RS_RASTERIZER_STATE);
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WINE_D3D10_TO_STR(D3D10_DST_PREDICATION);
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default:
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FIXME("Unrecognized D3D10_DEVICE_STATE_TYPES %#x.\n", t);
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return "unrecognized";
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}
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}
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#undef WINE_D3D10_TO_STR
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#undef WINE_D3D10_TO_STR
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void *d3d10_rb_alloc(size_t size)
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void *d3d10_rb_alloc(size_t size)
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@ -30,6 +30,34 @@
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#define D3D10_BYTES_FROM_BITS(x) (((x) + 7) >> 3)
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#define D3D10_BYTES_FROM_BITS(x) (((x) + 7) >> 3)
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#endif
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#endif
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typedef enum _D3D10_DEVICE_STATE_TYPES
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{
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D3D10_DST_SO_BUFFERS = 1,
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D3D10_DST_OM_RENDER_TARGETS,
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D3D10_DST_DEPTH_STENCIL_STATE,
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D3D10_DST_BLEND_STATE,
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D3D10_DST_VS,
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D3D10_DST_VS_SAMPLERS,
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D3D10_DST_VS_SHADER_RESOURCES,
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D3D10_DST_VS_CONSTANT_BUFFERS,
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D3D10_DST_GS,
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D3D10_DST_GS_SAMPLERS,
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D3D10_DST_GS_SHADER_RESOURCES,
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D3D10_DST_GS_CONSTANT_BUFFERS,
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D3D10_DST_PS,
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D3D10_DST_PS_SAMPLERS,
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D3D10_DST_PS_SHADER_RESOURCES,
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D3D10_DST_PS_CONSTANT_BUFFERS,
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D3D10_DST_IA_VERTEX_BUFFERS,
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D3D10_DST_IA_INDEX_BUFFER,
|
||||||
|
D3D10_DST_IA_INPUT_LAYOUT,
|
||||||
|
D3D10_DST_IA_PRIMITIVE_TOPOLOGY,
|
||||||
|
D3D10_DST_RS_VIEWPORTS,
|
||||||
|
D3D10_DST_RS_SCISSOR_RECTS,
|
||||||
|
D3D10_DST_RS_RASTERIZER_STATE,
|
||||||
|
D3D10_DST_PREDICATION,
|
||||||
|
} D3D10_DEVICE_STATE_TYPES;
|
||||||
|
|
||||||
typedef struct _D3D10_EFFECT_TYPE_DESC
|
typedef struct _D3D10_EFFECT_TYPE_DESC
|
||||||
{
|
{
|
||||||
LPCSTR TypeName;
|
LPCSTR TypeName;
|
||||||
|
@ -807,6 +835,8 @@ HRESULT WINAPI D3D10CreateStateBlock(ID3D10Device *device,
|
||||||
HRESULT WINAPI D3D10StateBlockMaskDifference(D3D10_STATE_BLOCK_MASK *mask_x,
|
HRESULT WINAPI D3D10StateBlockMaskDifference(D3D10_STATE_BLOCK_MASK *mask_x,
|
||||||
D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result);
|
D3D10_STATE_BLOCK_MASK *mask_y, D3D10_STATE_BLOCK_MASK *result);
|
||||||
HRESULT WINAPI D3D10StateBlockMaskDisableAll(D3D10_STATE_BLOCK_MASK *mask);
|
HRESULT WINAPI D3D10StateBlockMaskDisableAll(D3D10_STATE_BLOCK_MASK *mask);
|
||||||
|
HRESULT WINAPI D3D10StateBlockMaskDisableCapture(D3D10_STATE_BLOCK_MASK *mask,
|
||||||
|
D3D10_DEVICE_STATE_TYPES state_type, UINT start_idx, UINT count);
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue