wined3d: Recognize SM5 atomic_imax opcode.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -5205,6 +5205,7 @@ static const SHADER_HANDLER shader_arb_instruction_handler_table[WINED3DSIH_TABL
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/* WINED3DSIH_ATOMIC_AND */ NULL,
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/* WINED3DSIH_ATOMIC_AND */ NULL,
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/* WINED3DSIH_ATOMIC_CMP_STORE */ NULL,
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/* WINED3DSIH_ATOMIC_CMP_STORE */ NULL,
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/* WINED3DSIH_ATOMIC_IADD */ NULL,
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/* WINED3DSIH_ATOMIC_IADD */ NULL,
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/* WINED3DSIH_ATOMIC_IMAX */ NULL,
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/* WINED3DSIH_ATOMIC_OR */ NULL,
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/* WINED3DSIH_ATOMIC_OR */ NULL,
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/* WINED3DSIH_ATOMIC_UMAX */ NULL,
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/* WINED3DSIH_ATOMIC_UMAX */ NULL,
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/* WINED3DSIH_ATOMIC_UMIN */ NULL,
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/* WINED3DSIH_ATOMIC_UMIN */ NULL,
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@ -8929,6 +8929,7 @@ static const SHADER_HANDLER shader_glsl_instruction_handler_table[WINED3DSIH_TAB
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/* WINED3DSIH_ATOMIC_AND */ NULL,
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/* WINED3DSIH_ATOMIC_AND */ NULL,
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/* WINED3DSIH_ATOMIC_CMP_STORE */ NULL,
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/* WINED3DSIH_ATOMIC_CMP_STORE */ NULL,
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/* WINED3DSIH_ATOMIC_IADD */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_IADD */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_IMAX */ NULL,
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/* WINED3DSIH_ATOMIC_OR */ NULL,
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/* WINED3DSIH_ATOMIC_OR */ NULL,
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/* WINED3DSIH_ATOMIC_UMAX */ NULL,
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/* WINED3DSIH_ATOMIC_UMAX */ NULL,
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/* WINED3DSIH_ATOMIC_UMIN */ NULL,
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/* WINED3DSIH_ATOMIC_UMIN */ NULL,
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@ -46,6 +46,7 @@ static const char * const shader_opcode_names[] =
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/* WINED3DSIH_ATOMIC_AND */ "atomic_and",
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/* WINED3DSIH_ATOMIC_AND */ "atomic_and",
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/* WINED3DSIH_ATOMIC_CMP_STORE */ "atomic_cmp_store",
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/* WINED3DSIH_ATOMIC_CMP_STORE */ "atomic_cmp_store",
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/* WINED3DSIH_ATOMIC_IADD */ "atomic_iadd",
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/* WINED3DSIH_ATOMIC_IADD */ "atomic_iadd",
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/* WINED3DSIH_ATOMIC_IMAX */ "atomic_imax",
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/* WINED3DSIH_ATOMIC_OR */ "atomic_or",
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/* WINED3DSIH_ATOMIC_OR */ "atomic_or",
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/* WINED3DSIH_ATOMIC_UMAX */ "atomic_umax",
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/* WINED3DSIH_ATOMIC_UMAX */ "atomic_umax",
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/* WINED3DSIH_ATOMIC_UMIN */ "atomic_umin",
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/* WINED3DSIH_ATOMIC_UMIN */ "atomic_umin",
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@ -264,6 +264,7 @@ enum wined3d_sm4_opcode
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WINED3D_SM5_OP_ATOMIC_XOR = 0xab,
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WINED3D_SM5_OP_ATOMIC_XOR = 0xab,
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WINED3D_SM5_OP_ATOMIC_CMP_STORE = 0xac,
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WINED3D_SM5_OP_ATOMIC_CMP_STORE = 0xac,
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WINED3D_SM5_OP_ATOMIC_IADD = 0xad,
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WINED3D_SM5_OP_ATOMIC_IADD = 0xad,
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WINED3D_SM5_OP_ATOMIC_IMAX = 0xae,
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WINED3D_SM5_OP_ATOMIC_UMAX = 0xb0,
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WINED3D_SM5_OP_ATOMIC_UMAX = 0xb0,
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WINED3D_SM5_OP_ATOMIC_UMIN = 0xb1,
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WINED3D_SM5_OP_ATOMIC_UMIN = 0xb1,
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WINED3D_SM5_OP_IMM_ATOMIC_ALLOC = 0xb2,
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WINED3D_SM5_OP_IMM_ATOMIC_ALLOC = 0xb2,
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@ -970,6 +971,7 @@ static const struct wined3d_sm4_opcode_info opcode_table[] =
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{WINED3D_SM5_OP_ATOMIC_XOR, WINED3DSIH_ATOMIC_XOR, "U", "iu"},
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{WINED3D_SM5_OP_ATOMIC_XOR, WINED3DSIH_ATOMIC_XOR, "U", "iu"},
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{WINED3D_SM5_OP_ATOMIC_CMP_STORE, WINED3DSIH_ATOMIC_CMP_STORE, "U", "iuu"},
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{WINED3D_SM5_OP_ATOMIC_CMP_STORE, WINED3DSIH_ATOMIC_CMP_STORE, "U", "iuu"},
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{WINED3D_SM5_OP_ATOMIC_IADD, WINED3DSIH_ATOMIC_IADD, "U", "ii"},
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{WINED3D_SM5_OP_ATOMIC_IADD, WINED3DSIH_ATOMIC_IADD, "U", "ii"},
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{WINED3D_SM5_OP_ATOMIC_IMAX, WINED3DSIH_ATOMIC_IMAX, "U", "ii"},
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{WINED3D_SM5_OP_ATOMIC_UMAX, WINED3DSIH_ATOMIC_UMAX, "U", "iu"},
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{WINED3D_SM5_OP_ATOMIC_UMAX, WINED3DSIH_ATOMIC_UMAX, "U", "iu"},
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{WINED3D_SM5_OP_ATOMIC_UMIN, WINED3DSIH_ATOMIC_UMIN, "U", "iu"},
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{WINED3D_SM5_OP_ATOMIC_UMIN, WINED3DSIH_ATOMIC_UMIN, "U", "iu"},
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{WINED3D_SM5_OP_IMM_ATOMIC_ALLOC, WINED3DSIH_IMM_ATOMIC_ALLOC, "u", "U"},
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{WINED3D_SM5_OP_IMM_ATOMIC_ALLOC, WINED3DSIH_IMM_ATOMIC_ALLOC, "u", "U"},
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@ -577,6 +577,7 @@ enum WINED3D_SHADER_INSTRUCTION_HANDLER
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WINED3DSIH_ATOMIC_AND,
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WINED3DSIH_ATOMIC_AND,
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WINED3DSIH_ATOMIC_CMP_STORE,
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WINED3DSIH_ATOMIC_CMP_STORE,
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WINED3DSIH_ATOMIC_IADD,
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WINED3DSIH_ATOMIC_IADD,
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WINED3DSIH_ATOMIC_IMAX,
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WINED3DSIH_ATOMIC_OR,
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WINED3DSIH_ATOMIC_OR,
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WINED3DSIH_ATOMIC_UMAX,
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WINED3DSIH_ATOMIC_UMAX,
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WINED3DSIH_ATOMIC_UMIN,
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WINED3DSIH_ATOMIC_UMIN,
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