winedbg: Use better register names for ARM disassembling.
This commit is contained in:
André Hentschel
Alexandre Julliard
parent
abc304f309
commit
51df30b25c
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@ -44,6 +44,11 @@ static BOOL db_display = FALSE;
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#define get_cond(ins) tbl_cond[(ins >> 28) & 0x0f]
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#define get_nibble(ins, num) ((ins >> (num * 4)) & 0x0f)
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static char const tbl_regs[][4] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"fp", "ip", "sp", "lr", "pc", "cpsr"
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};
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static char const tbl_addrmode[][3] = {
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"da", "ia", "db", "ib"
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};
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@ -93,7 +98,7 @@ static UINT arm_disasm_branch(UINT inst)
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if (offset & 0x02000000) offset |= 0xfc000000;
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offset += 8;
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dbg_printf("\n\tb%s%s\t#%d/0x%08x", link ? "l" : "", get_cond(inst), offset, offset);
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dbg_printf("\n\tb%s%s\t#%d", link ? "l" : "", get_cond(inst), offset);
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return 0;
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}
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@ -113,22 +118,21 @@ static UINT arm_disasm_dataprocessing(UINT inst)
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}
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dbg_printf("\n\t%s%s%s", tbl_dataops[opcode], condcodes ? "s" : "", get_cond(inst));
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dbg_printf("\t%s, ", tbl_regs[get_nibble(inst, 3)]);
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if (no_op1)
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{
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if (immediate)
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dbg_printf("\tr%u, #%u", get_nibble(inst, 3),
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ROR32(inst & 0xff, 2 * get_nibble(inst, 2)));
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dbg_printf("#%u", ROR32(inst & 0xff, 2 * get_nibble(inst, 2)));
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else
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dbg_printf("\tr%u, r%u", get_nibble(inst, 3), get_nibble(inst, 0));
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dbg_printf("%s", tbl_regs[get_nibble(inst, 0)]);
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}
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else
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{
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if (immediate)
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dbg_printf("\tr%u, r%u, #%u", get_nibble(inst, 3), get_nibble(inst, 4),
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dbg_printf("%s, #%u", tbl_regs[get_nibble(inst, 4)],
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ROR32(inst & 0xff, 2 * get_nibble(inst, 2)));
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else
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dbg_printf("\tr%u, r%u, r%u", get_nibble(inst, 3), get_nibble(inst, 4),
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get_nibble(inst, 0));
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dbg_printf("%s, %s", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
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}
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return 0;
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}
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@ -147,20 +151,20 @@ static UINT arm_disasm_singletrans(UINT inst)
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dbg_printf("\n\t%s%s%s%s", load ? "ldr" : "str", byte ? "b" : "", writeback ? "t" : "",
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get_cond(inst));
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dbg_printf("\tr%u, ", get_nibble(inst, 3));
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dbg_printf("\t%s, ", tbl_regs[get_nibble(inst, 3)]);
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if (indexing)
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{
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if (immediate)
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dbg_printf("[r%u, #%d]", get_nibble(inst, 4), offset);
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dbg_printf("[%s, #%d]", tbl_regs[get_nibble(inst, 4)], offset);
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else
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dbg_printf("[r%u, r%u]", get_nibble(inst, 4), get_nibble(inst, 0));
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dbg_printf("[%s, %s]", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
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}
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else
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{
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if (immediate)
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dbg_printf("[r%u], #%d", get_nibble(inst, 4), offset);
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dbg_printf("[%s], #%d", tbl_regs[get_nibble(inst, 4)], offset);
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else
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dbg_printf("[r%u], r%u", get_nibble(inst, 4), get_nibble(inst, 0));
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dbg_printf("[%s], %s", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
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}
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return 0;
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}
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@ -180,20 +184,20 @@ static UINT arm_disasm_halfwordtrans(UINT inst)
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dbg_printf("\n\t%s%s%s%s%s", load ? "ldr" : "str", sign ? "s" : "",
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halfword ? "h" : (sign ? "b" : ""), writeback ? "t" : "", get_cond(inst));
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dbg_printf("\tr%u, ", get_nibble(inst, 3));
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dbg_printf("\t%s, ", tbl_regs[get_nibble(inst, 3)]);
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if (indexing)
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{
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if (immediate)
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dbg_printf("[r%u, #%d]", get_nibble(inst, 4), offset);
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dbg_printf("[%s, #%d]", tbl_regs[get_nibble(inst, 4)], offset);
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else
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dbg_printf("[r%u, r%u]", get_nibble(inst, 4), get_nibble(inst, 0));
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dbg_printf("[%s, %s]", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
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}
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else
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{
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if (immediate)
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dbg_printf("[r%u], #%d", get_nibble(inst, 4), offset);
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dbg_printf("[%s], #%d", tbl_regs[get_nibble(inst, 4)], offset);
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else
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dbg_printf("[r%u], r%u", get_nibble(inst, 4), get_nibble(inst, 0));
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dbg_printf("[%s], %s", tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)]);
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}
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return 0;
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}
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@ -213,13 +217,13 @@ static UINT arm_disasm_blocktrans(UINT inst)
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break;
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}
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dbg_printf("\n\t%s%s%s\tr%u%s, {", load ? "ldm" : "stm", tbl_addrmode[addrmode], get_cond(inst),
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get_nibble(inst, 4), writeback ? "!" : "");
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dbg_printf("\n\t%s%s%s\t%s%s, {", load ? "ldm" : "stm", tbl_addrmode[addrmode], get_cond(inst),
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tbl_regs[get_nibble(inst, 4)], writeback ? "!" : "");
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for (i=0;i<=15;i++)
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if ((inst>>i) & 1)
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{
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if (i == last) dbg_printf("r%u", i);
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else dbg_printf("r%u, ", i);
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if (i == last) dbg_printf("%s", tbl_regs[i]);
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else dbg_printf("%s, ", tbl_regs[i]);
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}
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dbg_printf("}%s", psr ? "^" : "");
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return 0;
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@ -241,8 +245,8 @@ static UINT arm_disasm_coproctrans(UINT inst)
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WORD load = (inst >> 20) & 0x01;
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WORD CP_Opc = (inst >> 21) & 0x07;
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dbg_printf("\n\t%s%s\t%u, %u, r%u, cr%u, cr%u, {%u}", load ? "mrc" : "mcr", get_cond(inst), CPnum,
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CP, get_nibble(inst, 3), CRn, CRm, CP_Opc);
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dbg_printf("\n\t%s%s\t%u, %u, %s, cr%u, cr%u, {%u}", load ? "mrc" : "mcr", get_cond(inst), CPnum,
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CP, tbl_regs[get_nibble(inst, 3)], CRn, CRm, CP_Opc);
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return 0;
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}
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@ -275,9 +279,9 @@ static UINT arm_disasm_coprocdatatrans(UINT inst)
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dbg_printf("\n\t%s%s%s", load ? "ldc" : "stc", translen ? "l" : "", get_cond(inst));
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if (indexing)
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dbg_printf("\t%u, cr%u, [r%u, #%d]%s", CPnum, CRd, get_nibble(inst, 4), offset, writeback?"!":"");
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dbg_printf("\t%u, cr%u, [%s, #%d]%s", CPnum, CRd, tbl_regs[get_nibble(inst, 4)], offset, writeback?"!":"");
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else
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dbg_printf("\t%u, cr%u, [r%u], #%d", CPnum, CRd, get_nibble(inst, 4), offset);
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dbg_printf("\t%u, cr%u, [%s], #%d", CPnum, CRd, tbl_regs[get_nibble(inst, 4)], offset);
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return 0;
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}
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@ -293,9 +297,9 @@ static WORD thumb_disasm_hireg(WORD inst, ADDRESS64 *addr)
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if (h2) src += 8;
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if (op == 3)
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dbg_printf("\n\tb%sx\tr%u", h1?"l":"", src);
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dbg_printf("\n\tb%sx\t%s", h1?"l":"", tbl_regs[src]);
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else
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dbg_printf("\n\t%s\tr%u, r%u", tbl_hiops_t[op], dst, src);
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dbg_printf("\n\t%s\t%s, %s", tbl_hiops_t[op], tbl_regs[dst], tbl_regs[src]);
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return 0;
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}
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@ -316,8 +320,8 @@ static WORD thumb_disasm_blocktrans(WORD inst, ADDRESS64 *addr)
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for (i=0;i<=7;i++)
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if ((inst>>i) & 1)
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{
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if (i == last) dbg_printf("r%u", i);
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else dbg_printf("r%u, ", i);
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if (i == last) dbg_printf("%s", tbl_regs[i]);
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else dbg_printf("%s, ", tbl_regs[i]);
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}
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if (lrpc)
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dbg_printf(", %s", load ? "pc" : "lr");
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@ -356,29 +360,29 @@ static WORD thumb_disasm_nop(WORD inst, ADDRESS64 *addr)
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static WORD thumb_disasm_ldrpcrel(WORD inst, ADDRESS64 *addr)
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{
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WORD offset = (inst & 0xff) << 2;
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dbg_printf("\n\tldr\tr%u, [pc, #%u]", (inst >> 8) & 0x07, offset);
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dbg_printf("\n\tldr\t%s, [pc, #%u]", tbl_regs[(inst >> 8) & 0x07], offset);
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return 0;
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}
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static WORD thumb_disasm_ldrsprel(WORD inst, ADDRESS64 *addr)
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{
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WORD offset = (inst & 0xff) << 2;
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dbg_printf("\n\t%s\tr%u, [sp, #%u]", (inst & 0x0800)?"ldr":"str", (inst >> 8) & 0x07, offset);
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dbg_printf("\n\t%s\t%s, [sp, #%u]", (inst & 0x0800)?"ldr":"str", tbl_regs[(inst >> 8) & 0x07], offset);
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return 0;
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}
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static WORD thumb_disasm_ldrimm(WORD inst, ADDRESS64 *addr)
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{
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WORD offset = (inst & 0x07c0) >> 6;
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dbg_printf("\n\t%s%s\tr%u, [r%u, #%u]", (inst & 0x0800)?"ldr":"str", (inst & 0x1000)?"b":"",
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inst & 0x07, (inst >> 3) & 0x07, (inst & 0x1000)?offset:(offset << 2));
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dbg_printf("\n\t%s%s\t%s, [%s, #%u]", (inst & 0x0800)?"ldr":"str", (inst & 0x1000)?"b":"",
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tbl_regs[inst & 0x07], tbl_regs[(inst >> 3) & 0x07], (inst & 0x1000)?offset:(offset << 2));
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return 0;
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}
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static WORD thumb_disasm_immop(WORD inst, ADDRESS64 *addr)
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{
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WORD op = (inst >> 11) & 0x03;
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dbg_printf("\n\t%s\tr%u, #%u", tbl_immops_t[op], (inst >> 8) & 0x07, inst & 0xff);
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dbg_printf("\n\t%s\t%s, #%u", tbl_immops_t[op], tbl_regs[(inst >> 8) & 0x07], inst & 0xff);
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return 0;
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}
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