wined3d: Recognize SM5 atomic_xor opcode.

Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
This commit is contained in:
Józef Kucia 2016-12-05 12:04:28 +01:00 committed by Alexandre Julliard
parent bf4e1c442d
commit 51b14bb503
5 changed files with 6 additions and 0 deletions

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@ -5203,6 +5203,7 @@ static const SHADER_HANDLER shader_arb_instruction_handler_table[WINED3DSIH_TABL
/* WINED3DSIH_ADD */ shader_hw_map2gl, /* WINED3DSIH_ADD */ shader_hw_map2gl,
/* WINED3DSIH_AND */ NULL, /* WINED3DSIH_AND */ NULL,
/* WINED3DSIH_ATOMIC_IADD */ NULL, /* WINED3DSIH_ATOMIC_IADD */ NULL,
/* WINED3DSIH_ATOMIC_XOR */ NULL,
/* WINED3DSIH_BEM */ pshader_hw_bem, /* WINED3DSIH_BEM */ pshader_hw_bem,
/* WINED3DSIH_BFI */ NULL, /* WINED3DSIH_BFI */ NULL,
/* WINED3DSIH_BFREV */ NULL, /* WINED3DSIH_BFREV */ NULL,

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@ -8866,6 +8866,7 @@ static const SHADER_HANDLER shader_glsl_instruction_handler_table[WINED3DSIH_TAB
/* WINED3DSIH_ADD */ shader_glsl_binop, /* WINED3DSIH_ADD */ shader_glsl_binop,
/* WINED3DSIH_AND */ shader_glsl_binop, /* WINED3DSIH_AND */ shader_glsl_binop,
/* WINED3DSIH_ATOMIC_IADD */ shader_glsl_atomic, /* WINED3DSIH_ATOMIC_IADD */ shader_glsl_atomic,
/* WINED3DSIH_ATOMIC_XOR */ NULL,
/* WINED3DSIH_BEM */ shader_glsl_bem, /* WINED3DSIH_BEM */ shader_glsl_bem,
/* WINED3DSIH_BFI */ NULL, /* WINED3DSIH_BFI */ NULL,
/* WINED3DSIH_BFREV */ NULL, /* WINED3DSIH_BFREV */ NULL,

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@ -44,6 +44,7 @@ static const char * const shader_opcode_names[] =
/* WINED3DSIH_ADD */ "add", /* WINED3DSIH_ADD */ "add",
/* WINED3DSIH_AND */ "and", /* WINED3DSIH_AND */ "and",
/* WINED3DSIH_ATOMIC_IADD */ "atomic_iadd", /* WINED3DSIH_ATOMIC_IADD */ "atomic_iadd",
/* WINED3DSIH_ATOMIC_XOR */ "atomic_xor",
/* WINED3DSIH_BEM */ "bem", /* WINED3DSIH_BEM */ "bem",
/* WINED3DSIH_BFI */ "bfi", /* WINED3DSIH_BFI */ "bfi",
/* WINED3DSIH_BFREV */ "bfrev", /* WINED3DSIH_BFREV */ "bfrev",

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@ -251,6 +251,7 @@ enum wined3d_sm4_opcode
WINED3D_SM5_OP_STORE_RAW = 0xa6, WINED3D_SM5_OP_STORE_RAW = 0xa6,
WINED3D_SM5_OP_LD_STRUCTURED = 0xa7, WINED3D_SM5_OP_LD_STRUCTURED = 0xa7,
WINED3D_SM5_OP_STORE_STRUCTURED = 0xa8, WINED3D_SM5_OP_STORE_STRUCTURED = 0xa8,
WINED3D_SM5_OP_ATOMIC_XOR = 0xab,
WINED3D_SM5_OP_ATOMIC_IADD = 0xad, WINED3D_SM5_OP_ATOMIC_IADD = 0xad,
WINED3D_SM5_OP_IMM_ATOMIC_ALLOC = 0xb2, WINED3D_SM5_OP_IMM_ATOMIC_ALLOC = 0xb2,
WINED3D_SM5_OP_IMM_ATOMIC_CONSUME = 0xb3, WINED3D_SM5_OP_IMM_ATOMIC_CONSUME = 0xb3,
@ -896,6 +897,7 @@ static const struct wined3d_sm4_opcode_info opcode_table[] =
{WINED3D_SM5_OP_STORE_RAW, WINED3DSIH_STORE_RAW, "U", "iu"}, {WINED3D_SM5_OP_STORE_RAW, WINED3DSIH_STORE_RAW, "U", "iu"},
{WINED3D_SM5_OP_LD_STRUCTURED, WINED3DSIH_LD_STRUCTURED, "u", "iiR"}, {WINED3D_SM5_OP_LD_STRUCTURED, WINED3DSIH_LD_STRUCTURED, "u", "iiR"},
{WINED3D_SM5_OP_STORE_STRUCTURED, WINED3DSIH_STORE_STRUCTURED, "U", "iiu"}, {WINED3D_SM5_OP_STORE_STRUCTURED, WINED3DSIH_STORE_STRUCTURED, "U", "iiu"},
{WINED3D_SM5_OP_ATOMIC_XOR, WINED3DSIH_ATOMIC_XOR, "U", "iu"},
{WINED3D_SM5_OP_ATOMIC_IADD, WINED3DSIH_ATOMIC_IADD, "U", "ii"}, {WINED3D_SM5_OP_ATOMIC_IADD, WINED3DSIH_ATOMIC_IADD, "U", "ii"},
{WINED3D_SM5_OP_IMM_ATOMIC_ALLOC, WINED3DSIH_IMM_ATOMIC_ALLOC, "u", "U"}, {WINED3D_SM5_OP_IMM_ATOMIC_ALLOC, WINED3DSIH_IMM_ATOMIC_ALLOC, "u", "U"},
{WINED3D_SM5_OP_IMM_ATOMIC_CONSUME, WINED3DSIH_IMM_ATOMIC_CONSUME, "u", "U"}, {WINED3D_SM5_OP_IMM_ATOMIC_CONSUME, WINED3DSIH_IMM_ATOMIC_CONSUME, "u", "U"},

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@ -570,6 +570,7 @@ enum WINED3D_SHADER_INSTRUCTION_HANDLER
WINED3DSIH_ADD, WINED3DSIH_ADD,
WINED3DSIH_AND, WINED3DSIH_AND,
WINED3DSIH_ATOMIC_IADD, WINED3DSIH_ATOMIC_IADD,
WINED3DSIH_ATOMIC_XOR,
WINED3DSIH_BEM, WINED3DSIH_BEM,
WINED3DSIH_BFI, WINED3DSIH_BFI,
WINED3DSIH_BFREV, WINED3DSIH_BFREV,