wined3d: Implement SM5 atomic_* instructions.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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2066d24634
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@ -4926,21 +4926,13 @@ static void shader_glsl_atomic(const struct wined3d_shader_instruction *ins)
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{
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{
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const struct wined3d_shader_reg_maps *reg_maps = ins->ctx->reg_maps;
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const struct wined3d_shader_reg_maps *reg_maps = ins->ctx->reg_maps;
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const struct wined3d_shader_version *version = ®_maps->shader_version;
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const struct wined3d_shader_version *version = ®_maps->shader_version;
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struct glsl_src_param image_coord_param, image_data_param;
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struct glsl_src_param coord_param, data_param, data_param2;
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enum wined3d_shader_resource_type resource_type;
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enum wined3d_shader_resource_type resource_type;
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enum wined3d_data_type data_type;
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enum wined3d_data_type data_type;
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unsigned int uav_idx;
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unsigned int uav_idx;
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DWORD coord_mask;
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DWORD coord_mask;
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const char *op;
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const char *op;
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switch (ins->handler_idx)
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{
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case WINED3DSIH_ATOMIC_IADD: op = "imageAtomicAdd"; break;
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default:
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ERR("Unhandled opcode %#x.\n", ins->handler_idx);
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return;
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}
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uav_idx = ins->dst[0].reg.idx[0].offset;
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uav_idx = ins->dst[0].reg.idx[0].offset;
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resource_type = reg_maps->uav_resource_info[uav_idx].type;
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resource_type = reg_maps->uav_resource_info[uav_idx].type;
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if (resource_type >= ARRAY_SIZE(resource_type_info))
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if (resource_type >= ARRAY_SIZE(resource_type_info))
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@ -4951,11 +4943,46 @@ static void shader_glsl_atomic(const struct wined3d_shader_instruction *ins)
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data_type = reg_maps->uav_resource_info[uav_idx].data_type;
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data_type = reg_maps->uav_resource_info[uav_idx].data_type;
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coord_mask = (1u << resource_type_info[resource_type].coord_size) - 1;
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coord_mask = (1u << resource_type_info[resource_type].coord_size) - 1;
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shader_glsl_add_src_param(ins, &ins->src[0], coord_mask, &image_coord_param);
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switch (ins->handler_idx)
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shader_glsl_add_src_param_ext(ins, &ins->src[1], WINED3DSP_WRITEMASK_ALL, &image_data_param, data_type);
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{
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shader_addline(ins->ctx->buffer, "%s(%s_image%u, %s, %s);\n",
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case WINED3DSIH_ATOMIC_AND:
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op, shader_glsl_get_prefix(version->type), uav_idx,
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op = "imageAtomicAnd";
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image_coord_param.param_str, image_data_param.param_str);
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break;
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case WINED3DSIH_ATOMIC_CMP_STORE:
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op = "imageAtomicCompSwap";
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break;
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case WINED3DSIH_ATOMIC_IADD:
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op = "imageAtomicAdd";
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break;
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case WINED3DSIH_ATOMIC_OR:
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op = "imageAtomicOr";
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break;
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case WINED3DSIH_ATOMIC_XOR:
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op = "imageAtomicXor";
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break;
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default:
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ERR("Unhandled opcode %#x.\n", ins->handler_idx);
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return;
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}
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shader_glsl_add_src_param(ins, &ins->src[0], coord_mask, &coord_param);
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if (reg_maps->uav_resource_info[uav_idx].flags & WINED3D_VIEW_BUFFER_RAW)
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shader_addline(ins->ctx->buffer, "%s(%s_image%u, %s / 4, ",
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op, shader_glsl_get_prefix(version->type), uav_idx, coord_param.param_str);
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else
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shader_addline(ins->ctx->buffer, "%s(%s_image%u, %s, ",
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op, shader_glsl_get_prefix(version->type), uav_idx, coord_param.param_str);
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shader_glsl_add_src_param_ext(ins, &ins->src[1], WINED3DSP_WRITEMASK_0, &data_param, data_type);
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shader_addline(ins->ctx->buffer, "%s", data_param.param_str);
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if (ins->src_count >= 3)
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{
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shader_glsl_add_src_param_ext(ins, &ins->src[2], WINED3DSP_WRITEMASK_0, &data_param2, data_type);
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shader_addline(ins->ctx->buffer, ", %s", data_param2.param_str);
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}
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shader_addline(ins->ctx->buffer, ");\n");
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}
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}
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static void shader_glsl_ld_uav(const struct wined3d_shader_instruction *ins)
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static void shader_glsl_ld_uav(const struct wined3d_shader_instruction *ins)
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@ -9160,15 +9187,15 @@ static const SHADER_HANDLER shader_glsl_instruction_handler_table[WINED3DSIH_TAB
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/* WINED3DSIH_ABS */ shader_glsl_map2gl,
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/* WINED3DSIH_ABS */ shader_glsl_map2gl,
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/* WINED3DSIH_ADD */ shader_glsl_binop,
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/* WINED3DSIH_ADD */ shader_glsl_binop,
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/* WINED3DSIH_AND */ shader_glsl_binop,
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/* WINED3DSIH_AND */ shader_glsl_binop,
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/* WINED3DSIH_ATOMIC_AND */ NULL,
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/* WINED3DSIH_ATOMIC_AND */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_CMP_STORE */ NULL,
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/* WINED3DSIH_ATOMIC_CMP_STORE */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_IADD */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_IADD */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_IMAX */ NULL,
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/* WINED3DSIH_ATOMIC_IMAX */ NULL,
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/* WINED3DSIH_ATOMIC_IMIN */ NULL,
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/* WINED3DSIH_ATOMIC_IMIN */ NULL,
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/* WINED3DSIH_ATOMIC_OR */ NULL,
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/* WINED3DSIH_ATOMIC_OR */ shader_glsl_atomic,
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/* WINED3DSIH_ATOMIC_UMAX */ NULL,
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/* WINED3DSIH_ATOMIC_UMAX */ NULL,
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/* WINED3DSIH_ATOMIC_UMIN */ NULL,
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/* WINED3DSIH_ATOMIC_UMIN */ NULL,
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/* WINED3DSIH_ATOMIC_XOR */ NULL,
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/* WINED3DSIH_ATOMIC_XOR */ shader_glsl_atomic,
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/* WINED3DSIH_BEM */ shader_glsl_bem,
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/* WINED3DSIH_BEM */ shader_glsl_bem,
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/* WINED3DSIH_BFI */ shader_glsl_bitwise_op,
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/* WINED3DSIH_BFI */ shader_glsl_bitwise_op,
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/* WINED3DSIH_BFREV */ shader_glsl_map2gl,
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/* WINED3DSIH_BFREV */ shader_glsl_map2gl,
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@ -1282,14 +1282,14 @@ static HRESULT shader_get_registers_used(struct wined3d_shader *shader, const st
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}
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}
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}
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}
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if (ins.handler_idx == WINED3DSIH_ATOMIC_IADD
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if ((WINED3DSIH_ATOMIC_AND <= ins.handler_idx && ins.handler_idx <= WINED3DSIH_ATOMIC_XOR)
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|| ins.handler_idx == WINED3DSIH_LD_UAV_TYPED)
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|| ins.handler_idx == WINED3DSIH_LD_UAV_TYPED)
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{
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{
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unsigned int reg_idx;
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unsigned int reg_idx;
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if (ins.handler_idx == WINED3DSIH_ATOMIC_IADD)
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if (ins.handler_idx == WINED3DSIH_LD_UAV_TYPED)
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reg_idx = ins.dst[0].reg.idx[0].offset;
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else
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reg_idx = ins.src[1].reg.idx[0].offset;
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reg_idx = ins.src[1].reg.idx[0].offset;
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else
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reg_idx = ins.dst[0].reg.idx[0].offset;
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if (reg_idx >= MAX_UNORDERED_ACCESS_VIEWS)
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if (reg_idx >= MAX_UNORDERED_ACCESS_VIEWS)
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{
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{
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ERR("Invalid UAV index %u.\n", reg_idx);
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ERR("Invalid UAV index %u.\n", reg_idx);
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