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d3dx9: Accept texture coordinate registers in dcl instruction.

This commit is contained in:
Matteo Bruni 2010-06-08 00:53:23 +02:00 committed by Alexandre Julliard
parent 00951f84ed
commit 2fa119f765
2 changed files with 34 additions and 13 deletions
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36
dlls/d3dx9_36/asmshader.y
View File

@ -255,6 +255,7 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
%type <modshift> omodifier %type <modshift> omodifier
%type <comptype> comp %type <comptype> comp
%type <declaration> dclusage %type <declaration> dclusage
%type <reg> dcl_inputreg
%type <samplertype> sampdcl %type <samplertype> sampdcl
%type <rel_reg> rel_reg %type <rel_reg> rel_reg
%type <reg> predicate %type <reg> predicate
@ -539,7 +540,7 @@ instruction: INSTR_ADD omods dreg ',' sregs
reg.writemask = $4; reg.writemask = $4;
asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, &reg); asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, &reg);
} }
| INSTR_DCL dclusage omods REG_INPUT | INSTR_DCL dclusage omods dcl_inputreg
{ {
struct shader_reg reg; struct shader_reg reg;
TRACE("Input reg declaration\n"); TRACE("Input reg declaration\n");
@ -549,14 +550,14 @@ instruction: INSTR_ADD omods dreg ',' sregs
set_parse_status(&asm_ctx, PARSE_ERR); set_parse_status(&asm_ctx, PARSE_ERR);
} }
ZeroMemory(&reg, sizeof(reg)); ZeroMemory(&reg, sizeof(reg));
reg.type = BWRITERSPR_INPUT; reg.type = $4.type;
reg.regnum = $4; reg.regnum = $4.regnum;
reg.rel_reg = NULL; reg.rel_reg = NULL;
reg.srcmod = 0; reg.srcmod = 0;
reg.writemask = BWRITERSP_WRITEMASK_ALL; reg.writemask = BWRITERSP_WRITEMASK_ALL;
asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, &reg); asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, &reg);
} }
| INSTR_DCL dclusage omods REG_INPUT writemask | INSTR_DCL dclusage omods dcl_inputreg writemask
{ {
struct shader_reg reg; struct shader_reg reg;
TRACE("Input reg declaration\n"); TRACE("Input reg declaration\n");
@ -566,14 +567,14 @@ instruction: INSTR_ADD omods dreg ',' sregs
set_parse_status(&asm_ctx, PARSE_ERR); set_parse_status(&asm_ctx, PARSE_ERR);
} }
ZeroMemory(&reg, sizeof(reg)); ZeroMemory(&reg, sizeof(reg));
reg.type = BWRITERSPR_INPUT; reg.type = $4.type;
reg.regnum = $4; reg.regnum = $4.regnum;
reg.rel_reg = NULL; reg.rel_reg = NULL;
reg.srcmod = 0; reg.srcmod = 0;
reg.writemask = $5; reg.writemask = $5;
asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, &reg); asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, &reg);
} }
| INSTR_DCL omods REG_INPUT | INSTR_DCL omods dcl_inputreg
{ {
struct shader_reg reg; struct shader_reg reg;
TRACE("Input reg declaration\n"); TRACE("Input reg declaration\n");
@ -583,14 +584,14 @@ instruction: INSTR_ADD omods dreg ',' sregs
set_parse_status(&asm_ctx, PARSE_ERR); set_parse_status(&asm_ctx, PARSE_ERR);
} }
ZeroMemory(&reg, sizeof(reg)); ZeroMemory(&reg, sizeof(reg));
reg.type = BWRITERSPR_INPUT; reg.type = $3.type;
reg.regnum = $3; reg.regnum = $3.regnum;
reg.rel_reg = NULL; reg.rel_reg = NULL;
reg.srcmod = 0; reg.srcmod = 0;
reg.writemask = BWRITERSP_WRITEMASK_ALL; reg.writemask = BWRITERSP_WRITEMASK_ALL;
asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, &reg); asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, &reg);
} }
| INSTR_DCL omods REG_INPUT writemask | INSTR_DCL omods dcl_inputreg writemask
{ {
struct shader_reg reg; struct shader_reg reg;
TRACE("Input reg declaration\n"); TRACE("Input reg declaration\n");
@ -600,8 +601,8 @@ instruction: INSTR_ADD omods dreg ',' sregs
set_parse_status(&asm_ctx, PARSE_ERR); set_parse_status(&asm_ctx, PARSE_ERR);
} }
ZeroMemory(&reg, sizeof(reg)); ZeroMemory(&reg, sizeof(reg));
reg.type = BWRITERSPR_INPUT; reg.type = $3.type;
reg.regnum = $3; reg.regnum = $3.regnum;
reg.rel_reg = NULL; reg.rel_reg = NULL;
reg.srcmod = 0; reg.srcmod = 0;
reg.writemask = $4; reg.writemask = $4;
@ -617,7 +618,7 @@ instruction: INSTR_ADD omods dreg ',' sregs
} }
asm_ctx.funcs->dcl_sampler(&asm_ctx, $2, $3.mod, $4, asm_ctx.line_no); asm_ctx.funcs->dcl_sampler(&asm_ctx, $2, $3.mod, $4, asm_ctx.line_no);
} }
| INSTR_DCL sampdcl omods REG_INPUT | INSTR_DCL sampdcl omods dcl_inputreg
{ {
TRACE("Error rule: sampler decl of input reg\n"); TRACE("Error rule: sampler decl of input reg\n");
asmparser_message(&asm_ctx, "Line %u: Sampler declarations of input regs is not valid\n", asmparser_message(&asm_ctx, "Line %u: Sampler declarations of input regs is not valid\n",
@ -1342,6 +1343,15 @@ dclusage: USAGE_POSITION
$$.dclusage = BWRITERDECLUSAGE_SAMPLE; $$.dclusage = BWRITERDECLUSAGE_SAMPLE;
} }
dcl_inputreg: REG_INPUT
{
$$.regnum = $1; $$.type = BWRITERSPR_INPUT;
}
| REG_TEXTURE
{
$$.regnum = $1; $$.type = BWRITERSPR_TEXTURE;
}
sampdcl: SAMPTYPE_1D sampdcl: SAMPTYPE_1D
{ {
$$ = BWRITERSTT_1D; $$ = BWRITERSTT_1D;

11
dlls/d3dx9_36/tests/asm.c
View File

@ -891,6 +891,17 @@ static void ps_2_0_test(void) {
"dcl v0\n", "dcl v0\n",
{0xffff0200, 0x0200001f, 0x80000000, 0x900f0000, 0x0000ffff} {0xffff0200, 0x0200001f, 0x80000000, 0x900f0000, 0x0000ffff}
}, },
{ /* shader 12 */
"ps_2_0\n"
"dcl t0.xyz\n"
"dcl t1\n",
{0xffff0200, 0x0200001f, 0x80000000, 0xb0070000, 0x0200001f, 0x80000000, 0xb00f0001, 0x0000ffff}
},
{ /* shader 13 */
"ps_2_0\n"
"dcl_pp t0\n",
{0xffff0200, 0x0200001f, 0x80000000, 0xb02f0000, 0x0000ffff}
},
}; };
exec_tests("ps_2_0", tests, sizeof(tests) / sizeof(tests[0])); exec_tests("ps_2_0", tests, sizeof(tests) / sizeof(tests[0]));