Add some more Alpha asm code and Alpha-specific parts.
This commit is contained in:
parent
5736111c83
commit
2c1b35dd17
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@ -70,6 +70,8 @@ static CRITICAL_SECTION vectored_handlers_section = { &critsect_debug, -1, 0, 0,
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# define GET_IP(context) ((LPVOID)(context)->pc)
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#elif defined(__powerpc__)
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# define GET_IP(context) ((LPVOID)(context)->Iar)
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#elif defined(__ALPHA__)
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# define GET_IP(context) ((LPVOID)(context)->Fir)
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#else
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# error You must define GET_IP for this CPU
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#endif
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@ -249,11 +249,11 @@ long interlocked_xchg_add( long *dest, long incr )
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__ASM_GLOBAL_FUNC(interlocked_cmpxchg,
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"L0cmpxchg:\n\t"
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"ldq_l $0,0($16)\n\t"
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"ldl_l $0,0($16)\n\t"
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"cmpeq $0,$18,$1\n\t"
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"beq $1,L1cmpxchg\n\t"
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"mov $17,$0\n\t"
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"stq_c $0,0($16)\n\t"
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"stl_c $0,0($16)\n\t"
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"beq $0,L0cmpxchg\n\t"
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"mov $18,$0\n"
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"L1cmpxchg:\n\t"
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@ -273,9 +273,9 @@ __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
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__ASM_GLOBAL_FUNC(interlocked_xchg,
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"L0xchg:\n\t"
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"ldq_l $0,0($16)\n\t"
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"ldl_l $0,0($16)\n\t"
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"mov $17,$1\n\t"
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"stq_c $1,0($16)\n\t"
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"stl_c $1,0($16)\n\t"
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"beq $1,L0xchg\n\t"
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"mb");
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@ -289,9 +289,9 @@ __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
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__ASM_GLOBAL_FUNC(interlocked_xchg_add,
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"L0xchg_add:\n\t"
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"ldq_l $0,0($16)\n\t"
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"addq $0,$17,$1\n\t"
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"stq_c $1,0($16)\n\t"
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"ldl_l $0,0($16)\n\t"
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"addl $0,$17,$1\n\t"
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"stl_c $1,0($16)\n\t"
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"beq $1,L0xchg_add\n\t"
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"mb");
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@ -312,9 +312,11 @@ void wine_pthread_init_current_teb( struct wine_pthread_thread_info *info )
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# else
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__asm__ __volatile__("mr 2, %0" : : "r" (info->teb_base));
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# endif
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#elif defined(HAVE__LWP_CREATE)
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/* On non-i386 Solaris, we use the LWP private pointer */
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_lwp_setprivate( info->teb_base );
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#elif defined(__ALPHA__)
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/* FIXME: On Alpha, the current TEB is not accessible to user-space */
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/* __asm__ __volatile__();*/
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#else
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# error You must implement wine_pthread_init_current_teb for your platform
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#endif
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/* set pid and tid */
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@ -344,6 +346,14 @@ void *wine_pthread_get_current_teb(void)
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# else
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__asm__( "mr %0,2" : "=r" (ret) );
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# endif
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#elif defined(__ALPHA__)
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/* 0x00ab is the PAL opcode for rdteb */
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__asm__( "lda $30,8($30)\n\t"
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"stq $0,0($30)\n\t"
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"call_pal 0x00ab\n\t"
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"mov $0,%0\n\t"
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"ldq $0,0($30)\n\t"
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"lda $30,-8($30)" : "=r" (ret) );
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#else
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# error wine_pthread_get_current_teb not defined for this architecture
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#endif /* __i386__ */
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@ -8,6 +8,7 @@ IMPORTS = dbghelp advapi32 kernel32 ntdll
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DELAYIMPORTS = user32
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C_SRCS = \
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be_alpha.c \
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be_i386.c \
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be_ppc.c \
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break.c \
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@ -0,0 +1,168 @@
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/*
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* Debugger Alpha specific functions
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*
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* Copyright 2004 Vincent Béron
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "debugger.h"
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#if defined(__ALPHA__)
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static unsigned be_alpha_get_addr(HANDLE hThread, const CONTEXT* ctx,
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enum be_cpu_addr bca, ADDRESS* addr)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static void be_alpha_single_step(CONTEXT* ctx, unsigned enable)
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{
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dbg_printf("not done\n");
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}
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static void be_alpha_print_context(HANDLE hThread, const CONTEXT* ctx)
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{
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dbg_printf("Context printing for Alpha not done yet\n");
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}
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static void be_alpha_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
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{
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}
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static struct dbg_internal_var be_alpha_ctx[] =
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{
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{0, NULL, 0, dbg_itype_none}
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};
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static const struct dbg_internal_var* be_alpha_init_registers(CONTEXT* ctx)
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{
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dbg_printf("not done\n");
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return be_alpha_ctx;
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}
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static unsigned be_alpha_is_step_over_insn(void* insn)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static unsigned be_alpha_is_function_return(void* insn)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static unsigned be_alpha_is_break_insn(void* insn)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static unsigned be_alpha_is_func_call(void* insn, void** insn_callee)
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{
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return FALSE;
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}
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static void be_alpha_disasm_one_insn(ADDRESS* addr, int display)
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{
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dbg_printf("Disasm NIY\n");
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}
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static unsigned be_alpha_insert_Xpoint(HANDLE hProcess, CONTEXT* ctx,
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enum be_xpoint_type type, void* addr,
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unsigned long* val, unsigned size)
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{
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unsigned long xbp;
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unsigned long sz;
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switch (type)
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{
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case be_xpoint_break:
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if (!size) return 0;
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if (!ReadProcessMemory(hProcess, addr, val, 4, &sz) || sz != 4) return 0;
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xbp = 0x7d821008; /* 7d 82 10 08 ... in big endian */
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if (!WriteProcessMemory(hProcess, addr, &xbp, 4, &sz) || sz != 4) return 0;
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break;
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default:
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dbg_printf("Unknown/unsupported bp type %c\n", type);
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return 0;
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}
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return 1;
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}
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static unsigned be_alpha_remove_Xpoint(HANDLE hProcess, CONTEXT* ctx,
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enum be_xpoint_type type, void* addr,
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unsigned long val, unsigned size)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static unsigned be_alpha_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static void be_alpha_clear_watchpoint(CONTEXT* ctx, unsigned idx)
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{
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dbg_printf("not done\n");
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}
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static int be_alpha_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
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{
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dbg_printf("not done\n");
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return 0;
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}
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static int be_alpha_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
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unsigned ext_sign, long long int* ret)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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static int be_alpha_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
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long double* ret)
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{
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dbg_printf("not done\n");
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return FALSE;
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}
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struct backend_cpu be_alpha =
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{
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be_cpu_linearize,
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be_cpu_build_addr,
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be_alpha_get_addr,
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be_alpha_single_step,
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be_alpha_print_context,
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be_alpha_print_segment_info,
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be_alpha_init_registers,
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be_alpha_is_step_over_insn,
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be_alpha_is_function_return,
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be_alpha_is_break_insn,
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be_alpha_is_func_call,
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be_alpha_disasm_one_insn,
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be_alpha_insert_Xpoint,
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be_alpha_remove_Xpoint,
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be_alpha_is_watchpoint_set,
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be_alpha_clear_watchpoint,
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be_alpha_adjust_pc_for_break,
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be_alpha_fetch_integer,
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be_alpha_fetch_float,
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};
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#endif
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@ -177,8 +177,7 @@ static size_t cpu_register_map[] = {
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FIELD_OFFSET(CONTEXT, SegFs),
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FIELD_OFFSET(CONTEXT, SegGs),
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};
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#else
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# ifdef __powerpc__
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#elif defined(__powerpc__)
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static size_t cpu_register_map[] = {
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FIELD_OFFSET(CONTEXT, Gpr0),
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FIELD_OFFSET(CONTEXT, Gpr1),
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@ -254,9 +253,80 @@ static size_t cpu_register_map[] = {
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/* FIXME: MQ is missing? FIELD_OFFSET(CONTEXT, Mq), */
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/* see gdb/nlm/ppc.c */
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};
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# else
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# error "Define the registers map for your CPU"
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# endif
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#elif defined(__ALPHA__)
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static size_t cpu_register_map[] = {
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FIELD_OFFSET(CONTEXT, IntV0),
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FIELD_OFFSET(CONTEXT, IntT0),
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FIELD_OFFSET(CONTEXT, IntT1),
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FIELD_OFFSET(CONTEXT, IntT2),
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FIELD_OFFSET(CONTEXT, IntT3),
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FIELD_OFFSET(CONTEXT, IntT4),
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FIELD_OFFSET(CONTEXT, IntT5),
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FIELD_OFFSET(CONTEXT, IntT6),
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FIELD_OFFSET(CONTEXT, IntT7),
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FIELD_OFFSET(CONTEXT, IntS0),
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FIELD_OFFSET(CONTEXT, IntS1),
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FIELD_OFFSET(CONTEXT, IntS2),
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FIELD_OFFSET(CONTEXT, IntS3),
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FIELD_OFFSET(CONTEXT, IntS4),
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FIELD_OFFSET(CONTEXT, IntS5),
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FIELD_OFFSET(CONTEXT, IntFp),
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FIELD_OFFSET(CONTEXT, IntA0),
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FIELD_OFFSET(CONTEXT, IntA1),
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FIELD_OFFSET(CONTEXT, IntA2),
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FIELD_OFFSET(CONTEXT, IntA3),
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FIELD_OFFSET(CONTEXT, IntA4),
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FIELD_OFFSET(CONTEXT, IntA5),
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FIELD_OFFSET(CONTEXT, IntT8),
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FIELD_OFFSET(CONTEXT, IntT9),
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FIELD_OFFSET(CONTEXT, IntT10),
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FIELD_OFFSET(CONTEXT, IntT11),
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FIELD_OFFSET(CONTEXT, IntRa),
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FIELD_OFFSET(CONTEXT, IntT12),
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FIELD_OFFSET(CONTEXT, IntAt),
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FIELD_OFFSET(CONTEXT, IntGp),
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FIELD_OFFSET(CONTEXT, IntSp),
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FIELD_OFFSET(CONTEXT, IntZero),
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FIELD_OFFSET(CONTEXT, FltF0),
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FIELD_OFFSET(CONTEXT, FltF1),
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FIELD_OFFSET(CONTEXT, FltF2),
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FIELD_OFFSET(CONTEXT, FltF3),
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FIELD_OFFSET(CONTEXT, FltF4),
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FIELD_OFFSET(CONTEXT, FltF5),
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FIELD_OFFSET(CONTEXT, FltF6),
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FIELD_OFFSET(CONTEXT, FltF7),
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FIELD_OFFSET(CONTEXT, FltF8),
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FIELD_OFFSET(CONTEXT, FltF9),
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FIELD_OFFSET(CONTEXT, FltF10),
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FIELD_OFFSET(CONTEXT, FltF11),
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FIELD_OFFSET(CONTEXT, FltF12),
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FIELD_OFFSET(CONTEXT, FltF13),
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FIELD_OFFSET(CONTEXT, FltF14),
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FIELD_OFFSET(CONTEXT, FltF15),
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FIELD_OFFSET(CONTEXT, FltF16),
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FIELD_OFFSET(CONTEXT, FltF17),
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FIELD_OFFSET(CONTEXT, FltF18),
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FIELD_OFFSET(CONTEXT, FltF19),
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FIELD_OFFSET(CONTEXT, FltF20),
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FIELD_OFFSET(CONTEXT, FltF21),
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FIELD_OFFSET(CONTEXT, FltF22),
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FIELD_OFFSET(CONTEXT, FltF23),
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FIELD_OFFSET(CONTEXT, FltF24),
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FIELD_OFFSET(CONTEXT, FltF25),
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FIELD_OFFSET(CONTEXT, FltF26),
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FIELD_OFFSET(CONTEXT, FltF27),
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FIELD_OFFSET(CONTEXT, FltF28),
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FIELD_OFFSET(CONTEXT, FltF29),
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FIELD_OFFSET(CONTEXT, FltF30),
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FIELD_OFFSET(CONTEXT, FltF31),
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/* FIXME: Didn't look for the right order yet */
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FIELD_OFFSET(CONTEXT, Fir),
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FIELD_OFFSET(CONTEXT, Fpcr),
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FIELD_OFFSET(CONTEXT, SoftFpcr),
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};
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#else
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# error Define the registers map for your CPU
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#endif
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static const size_t cpu_num_regs = (sizeof(cpu_register_map) / sizeof(cpu_register_map[0]));
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@ -1102,6 +1102,8 @@ struct backend_cpu* be_cpu;
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extern struct backend_cpu be_i386;
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#elif __powerpc__
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extern struct backend_cpu be_ppc;
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#elif __ALPHA__
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extern struct backend_cpu be_alpha;
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#else
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# error CPU unknown
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#endif
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@ -1115,6 +1117,8 @@ int main(int argc, char** argv)
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be_cpu = &be_i386;
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#elif __powerpc__
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be_cpu = &be_ppc;
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#elif __ALPHA__
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be_cpu = &be_alpha;
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#else
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# error CPU unknown
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#endif
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@ -749,6 +749,10 @@ static int output_immediate_imports( FILE *outfile )
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fprintf(outfile, "\t\"\\tlwz %s, 0(%s)\\n\"\n", ppc_reg[9], ppc_reg[1]);
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fprintf(outfile, "\t\"\\taddi %s, %s, 0x4\\n\"\n", ppc_reg[1], ppc_reg[1]);
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fprintf(outfile, "\t\"\\tbctr\\n");
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#elif defined(__ALPHA__)
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fprintf( outfile, "\tlda $0,imports\\n\"\n" );
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fprintf( outfile, "\t\"\\tlda $0,%d($0)\\n\"\n", pos);
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fprintf( outfile, "\t\"\\tjmp $31,($0)\\n" );
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#else
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#error You need to define import thunks for your architecture!
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#endif
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@ -952,6 +956,9 @@ static int output_delayed_imports( FILE *outfile, const DLLSPEC *spec )
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/* branch to ctr register. */
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fprintf( outfile, " \"bctr\\n\"\n");
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#elif defined(__ALPHA__)
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fprintf( outfile, " \"\\tjsr $26,__wine_delay_load\\n\"\n" );
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fprintf( outfile, " \"\\tjmp $31,($0)\\n\"\n" );
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#else
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#error You need to defined delayed import thunks for your architecture!
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#endif
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@ -997,6 +1004,10 @@ static int output_delayed_imports( FILE *outfile, const DLLSPEC *spec )
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fprintf( outfile, " \"\\taddic %s, %s, 0x4\\n\"\n", ppc_reg[1], ppc_reg[1]);
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fprintf( outfile, " \"\\tb " __ASM_NAME("__wine_delay_load_asm") "\\n\"\n");
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#endif /* __APPLE__ */
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#elif defined(__ALPHA__)
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fprintf( outfile, " \"\\tlda $0,%d($31)\\n\"\n", j);
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fprintf( outfile, " \"\\tldah $0,%d($0)\\n\"\n", idx);
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fprintf( outfile, " \"\\tjmp $31,__wine_delay_load_asm\\n\"\n" );
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#else
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#error You need to defined delayed import thunks for your architecture!
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#endif
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@ -1064,6 +1075,10 @@ static int output_delayed_imports( FILE *outfile, const DLLSPEC *spec )
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fprintf( outfile, "\t\"\\tlwz %s, 0(%s)\\n\"\n", ppc_reg[9], ppc_reg[1]);
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fprintf( outfile, "\t\"\\taddi %s, %s, 0x4\\n\"\n", ppc_reg[1], ppc_reg[1]);
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fprintf( outfile, "\t\"\\tbctr\\n\"");
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#elif defined(__ALPHA__)
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fprintf( outfile, "\t\"lda $0,delay_imports\\n\"\n" );
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fprintf( outfile, "\t\"\\tlda $0,%d($0)\\n\"\n", pos);
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fprintf( outfile, "\t\"\\tjmp $31,($0)\\n\"" );
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#else
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#error You need to define delayed import thunks for your architecture!
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#endif
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@ -468,6 +468,19 @@ void output_dll_init( FILE *outfile, const char *constructor, const char *destru
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fprintf( outfile, " \"\\t.section\\t\\\".text\\\"\\n\");\n" );
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}
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# endif /* __APPLE__ */
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#elif defined(__ALPHA__)
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if (constructor)
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{
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fprintf( outfile, "asm(\"\\t.section\\t\\\".init\\\" ,\\\"ax\\\"\\n\"\n" );
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fprintf( outfile, " \"\\tjsr $26," __ASM_NAME("%s") "\\n\"\n", constructor );
|
||||
fprintf( outfile, " \"\\t.section\\t\\\".text\\\"\\n\");\n" );
|
||||
}
|
||||
if (destructor)
|
||||
{
|
||||
fprintf( outfile, "asm(\"\\t.section\\t\\\".fini\\\" ,\\\"ax\\\"\\n\"\n" );
|
||||
fprintf( outfile, " \"\\tjsr $26," __ASM_NAME("%s") "\\n\"\n", destructor );
|
||||
fprintf( outfile, " \"\\t.section\\t\\\".text\\\"\\n\");\n" );
|
||||
}
|
||||
#else
|
||||
#error You need to define the DLL constructor for your architecture
|
||||
#endif
|
||||
|
@ -757,6 +770,8 @@ void BuildSpec32File( FILE *outfile, DLLSPEC *spec )
|
|||
fprintf( outfile, " { 0x%04x,\n", IMAGE_FILE_MACHINE_I386 ); /* Machine */
|
||||
#elif defined(__powerpc__)
|
||||
fprintf( outfile, " { 0x%04x,\n", IMAGE_FILE_MACHINE_POWERPC ); /* Machine */
|
||||
#elif defined(__ALPHA__)
|
||||
fprintf( outfile, " { 0x%04x,\n", IMAGE_FILE_MACHINE_ALPHA ); /* Machine */
|
||||
#else
|
||||
fprintf( outfile, " { 0x%04x,\n", IMAGE_FILE_MACHINE_UNKNOWN ); /* Machine */
|
||||
#endif
|
||||
|
@ -965,6 +980,12 @@ void BuildDebugFile( FILE *outfile, const char *srcdir, char **argv )
|
|||
fprintf( outfile, " \"\\tbl " __ASM_NAME("__wine_dbg_%s_fini") "\\n\"\n", prefix );
|
||||
fprintf( outfile, " \"\\t.text\\n\");\n" );
|
||||
# endif
|
||||
#elif defined(__ALPHA__)
|
||||
fprintf( outfile, "asm(\"\\t.section\\t\\\".init\\\" ,\\\"ax\\\"\\n\"\n" );
|
||||
fprintf( outfile, " \"\\tjsr $26," __ASM_NAME("__wine_dbg_%s_init") "\\n\"\n", prefix );
|
||||
fprintf( outfile, " \"\\t.section\\t\\\".fini\\\" ,\\\"ax\\\"\\n\"\n" );
|
||||
fprintf( outfile, " \"\\tjsr $26," __ASM_NAME("__wine_dbg_%s_fini") "\\n\"\n", prefix );
|
||||
fprintf( outfile, " \"\\t.section\\t\\\".text\\\"\\n\");\n" );
|
||||
#else
|
||||
#error You need to define the DLL constructor for your architecture
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue