d3dx9: Support some flow control instructions in the shader assembler.
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5fd618a0cd
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25c929ab61
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@ -117,6 +117,18 @@ m4x3 {return INSTR_M4x3; }
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m3x4 {return INSTR_M3x4; }
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m3x3 {return INSTR_M3x3; }
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m3x2 {return INSTR_M3x2; }
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rep {return INSTR_REP; }
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endrep {return INSTR_ENDREP; }
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if {return INSTR_IF; }
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else {return INSTR_ELSE; }
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endif {return INSTR_ENDIF; }
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break {return INSTR_BREAK; }
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call {return INSTR_CALL; }
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callnz {return INSTR_CALLNZ; }
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loop {return INSTR_LOOP; }
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ret {return INSTR_RET; }
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endloop {return INSTR_ENDLOOP; }
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label {return INSTR_LABEL; }
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texldl {return INSTR_TEXLDL; }
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/* Vertex shader only instructions */
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@ -247,6 +259,8 @@ ps_3_0 {return VER_PS30; }
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\_abs {return SMOD_ABS; }
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! {return SMOD_NOT; }
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{PREPROCESSORDIRECTIVE} {
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/* TODO: update current line information */
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TRACE("line info update: %s", yytext);
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@ -116,6 +116,18 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
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%token INSTR_M3x4
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%token INSTR_M3x3
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%token INSTR_M3x2
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%token INSTR_REP
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%token INSTR_ENDREP
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%token INSTR_IF
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%token INSTR_ELSE
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%token INSTR_ENDIF
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%token INSTR_BREAK
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%token INSTR_CALL
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%token INSTR_CALLNZ
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%token INSTR_LOOP
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%token INSTR_RET
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%token INSTR_ENDLOOP
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%token INSTR_LABEL
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%token INSTR_TEXLDL
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/* Vertex shader only instructions */
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@ -168,6 +180,7 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
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/* Source register modifiers */
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%token SMOD_ABS
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%token SMOD_NOT
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/* Misc stuff */
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%token <component> COMPONENT
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@ -445,6 +458,66 @@ instruction: INSTR_ADD omods dreg ',' sregs
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TRACE("M3x2\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_M3x2, $2.mod, $2.shift, 0, &$3, &$5, 2);
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}
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| INSTR_REP sregs
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{
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TRACE("REP\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_REP, 0, 0, 0, 0, &$2, 1);
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}
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| INSTR_ENDREP
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{
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TRACE("ENDREP\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_ENDREP, 0, 0, 0, 0, 0, 0);
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}
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| INSTR_IF sregs
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{
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TRACE("IF\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_IF, 0, 0, 0, 0, &$2, 1);
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}
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| INSTR_ELSE
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{
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TRACE("ELSE\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_ELSE, 0, 0, 0, 0, 0, 0);
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}
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| INSTR_ENDIF
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{
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TRACE("ENDIF\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_ENDIF, 0, 0, 0, 0, 0, 0);
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}
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| INSTR_BREAK
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{
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TRACE("BREAK\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_BREAK, 0, 0, 0, 0, 0, 0);
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}
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| INSTR_CALL sregs
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{
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TRACE("CALL\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_CALL, 0, 0, 0, 0, &$2, 1);
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}
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| INSTR_CALLNZ sregs
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{
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TRACE("CALLNZ\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_CALLNZ, 0, 0, 0, 0, &$2, 2);
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}
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| INSTR_LOOP sregs
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{
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TRACE("LOOP\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_LOOP, 0, 0, 0, 0, &$2, 2);
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}
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| INSTR_RET
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{
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TRACE("RET\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_RET, 0, 0, 0, 0, 0, 0);
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}
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| INSTR_ENDLOOP
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{
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TRACE("ENDLOOP\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_ENDLOOP, 0, 0, 0, 0, 0, 0);
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}
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| INSTR_LABEL sregs
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{
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TRACE("LABEL\n");
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asm_ctx.funcs->instr(&asm_ctx, BWRITERSIO_LABEL, 0, 0, 0, 0, &$2, 1);
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}
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| INSTR_TEXLDL omods dreg ',' sregs
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{
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TRACE("TEXLDL\n");
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@ -743,6 +816,14 @@ sreg: sreg_name rel_reg swizzle
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}
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$$.swizzle = $5;
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}
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| SMOD_NOT sreg_name swizzle
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{
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$$.type = $2.type;
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$$.regnum = $2.regnum;
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$$.rel_reg = NULL;
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$$.srcmod = BWRITERSPSM_NOT;
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$$.swizzle = $3;
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}
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rel_reg: /* empty */
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{
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@ -74,6 +74,7 @@ DWORD d3d9_srcmod(DWORD bwriter_srcmod) {
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case BWRITERSPSM_NEG: return D3DSPSM_NEG;
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case BWRITERSPSM_ABS: return D3DSPSM_ABS;
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case BWRITERSPSM_ABSNEG: return D3DSPSM_ABSNEG;
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case BWRITERSPSM_NOT: return D3DSPSM_NOT;
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default:
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FIXME("Unhandled BWRITERSPSM token %u\n", bwriter_srcmod);
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return 0;
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@ -141,12 +142,24 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
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case BWRITERSIO_M3x4: return D3DSIO_M3x4;
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case BWRITERSIO_M3x3: return D3DSIO_M3x3;
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case BWRITERSIO_M3x2: return D3DSIO_M3x2;
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case BWRITERSIO_CALL: return D3DSIO_CALL;
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case BWRITERSIO_CALLNZ: return D3DSIO_CALLNZ;
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case BWRITERSIO_LOOP: return D3DSIO_LOOP;
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case BWRITERSIO_RET: return D3DSIO_RET;
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case BWRITERSIO_ENDLOOP: return D3DSIO_ENDLOOP;
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case BWRITERSIO_LABEL: return D3DSIO_LABEL;
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case BWRITERSIO_POW: return D3DSIO_POW;
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case BWRITERSIO_CRS: return D3DSIO_CRS;
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case BWRITERSIO_SGN: return D3DSIO_SGN;
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case BWRITERSIO_ABS: return D3DSIO_ABS;
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case BWRITERSIO_NRM: return D3DSIO_NRM;
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case BWRITERSIO_SINCOS: return D3DSIO_SINCOS;
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case BWRITERSIO_REP: return D3DSIO_REP;
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case BWRITERSIO_ENDREP: return D3DSIO_ENDREP;
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case BWRITERSIO_IF: return D3DSIO_IF;
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case BWRITERSIO_ELSE: return D3DSIO_ELSE;
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case BWRITERSIO_ENDIF: return D3DSIO_ENDIF;
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case BWRITERSIO_BREAK: return D3DSIO_BREAK;
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case BWRITERSIO_MOVA: return D3DSIO_MOVA;
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case BWRITERSIO_EXPP: return D3DSIO_EXPP;
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case BWRITERSIO_LOGP: return D3DSIO_LOGP;
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@ -167,6 +180,7 @@ const char *debug_print_srcmod(DWORD mod) {
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case BWRITERSPSM_NEG: return "D3DSPSM_NEG";
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case BWRITERSPSM_ABS: return "D3DSPSM_ABS";
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case BWRITERSPSM_ABSNEG: return "D3DSPSM_ABSNEG";
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case BWRITERSPSM_NOT: return "D3DSPSM_NOT";
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default: return "Unknown source modifier\n";
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}
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}
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@ -340,6 +354,10 @@ const char *debug_print_srcreg(const struct shader_reg *reg, shader_type st) {
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return wine_dbg_sprintf("-%s%s_abs%s", get_regname(reg, st),
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debug_print_relarg(reg),
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debug_print_swizzle(reg->swizzle));
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case BWRITERSPSM_NOT:
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return wine_dbg_sprintf("!%s%s%s", get_regname(reg, st),
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debug_print_relarg(reg),
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debug_print_swizzle(reg->swizzle));
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}
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return "Unknown modifier";
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}
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@ -371,12 +389,24 @@ const char *debug_print_opcode(DWORD opcode) {
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case BWRITERSIO_M3x4: return "m3x4";
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case BWRITERSIO_M3x3: return "m3x3";
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case BWRITERSIO_M3x2: return "m3x2";
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case BWRITERSIO_CALL: return "call";
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case BWRITERSIO_CALLNZ: return "callnz";
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case BWRITERSIO_LOOP: return "loop";
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case BWRITERSIO_RET: return "ret";
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case BWRITERSIO_ENDLOOP: return "endloop";
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case BWRITERSIO_LABEL: return "label";
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case BWRITERSIO_POW: return "pow";
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case BWRITERSIO_CRS: return "crs";
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case BWRITERSIO_SGN: return "sgn";
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case BWRITERSIO_ABS: return "abs";
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case BWRITERSIO_NRM: return "nrm";
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case BWRITERSIO_SINCOS: return "sincos";
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case BWRITERSIO_REP: return "rep";
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case BWRITERSIO_ENDREP: return "endrep";
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case BWRITERSIO_IF: return "if";
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case BWRITERSIO_ELSE: return "else";
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case BWRITERSIO_ENDIF: return "endif";
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case BWRITERSIO_BREAK: return "break";
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case BWRITERSIO_MOVA: return "mova";
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case BWRITERSIO_EXPP: return "expp";
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case BWRITERSIO_LOGP: return "logp";
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@ -318,6 +318,19 @@ static const struct instr_handler_table vs_3_handlers[] = {
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{BWRITERSIO_POW, instr_handler},
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{BWRITERSIO_MOVA, instr_handler},
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{BWRITERSIO_CALL, instr_handler},
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{BWRITERSIO_CALLNZ, instr_handler},
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{BWRITERSIO_REP, instr_handler},
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{BWRITERSIO_ENDREP, instr_handler},
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{BWRITERSIO_IF, instr_handler},
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{BWRITERSIO_LABEL, instr_handler},
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{BWRITERSIO_ELSE, instr_handler},
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{BWRITERSIO_ENDIF, instr_handler},
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{BWRITERSIO_BREAK, instr_handler},
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{BWRITERSIO_LOOP, instr_handler},
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{BWRITERSIO_RET, instr_handler},
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{BWRITERSIO_ENDLOOP, instr_handler},
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{BWRITERSIO_TEXLDL, instr_handler},
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{BWRITERSIO_END, NULL},
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@ -388,12 +388,24 @@ typedef enum _BWRITERSHADER_INSTRUCTION_OPCODE_TYPE {
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BWRITERSIO_M3x4,
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BWRITERSIO_M3x3,
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BWRITERSIO_M3x2,
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BWRITERSIO_CALL,
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BWRITERSIO_CALLNZ,
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BWRITERSIO_LOOP,
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BWRITERSIO_RET,
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BWRITERSIO_ENDLOOP,
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BWRITERSIO_LABEL,
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BWRITERSIO_POW,
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BWRITERSIO_CRS,
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BWRITERSIO_SGN,
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BWRITERSIO_ABS,
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BWRITERSIO_NRM,
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BWRITERSIO_SINCOS,
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BWRITERSIO_REP,
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BWRITERSIO_ENDREP,
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BWRITERSIO_IF,
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BWRITERSIO_ELSE,
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BWRITERSIO_ENDIF,
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BWRITERSIO_BREAK,
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BWRITERSIO_MOVA,
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BWRITERSIO_EXPP,
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@ -450,6 +462,7 @@ typedef enum _BWRITERSHADER_PARAM_SRCMOD_TYPE {
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BWRITERSPSM_NEG,
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BWRITERSPSM_ABS,
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BWRITERSPSM_ABSNEG,
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BWRITERSPSM_NOT,
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} BWRITERSHADER_PARAM_SRCMOD_TYPE;
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#define BWRITER_SM1_VS 0xfffe
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