2001-12-04 20:54:44 +01:00
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/*
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* Emulation of processor ioports.
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*
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* Copyright 1995 Morten Welinder
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* Copyright 1998 Andreas Mohr, Ove Kaaven
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2002-03-10 00:29:33 +01:00
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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2006-05-18 14:49:52 +02:00
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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2001-12-04 20:54:44 +01:00
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*/
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2003-09-18 00:45:46 +02:00
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/* Known problems:
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- only a few ports are emulated.
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- real-time clock in "cmos" is bogus. A nifty alarm() setup could
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fix that, I guess.
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*/
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2001-12-04 20:54:44 +01:00
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#include "config.h"
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2003-09-06 01:08:26 +02:00
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#include <stdarg.h>
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2003-09-18 00:45:46 +02:00
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#include <stdlib.h>
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2003-09-06 01:08:26 +02:00
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2001-12-04 20:54:44 +01:00
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#include "windef.h"
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2003-09-06 01:08:26 +02:00
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#include "winbase.h"
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2003-09-18 00:45:46 +02:00
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#include "winnls.h"
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#include "winreg.h"
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#include "winternl.h"
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2001-12-04 20:54:44 +01:00
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#include "dosexe.h"
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#include "vga.h"
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2003-09-18 00:45:46 +02:00
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#include "wine/unicode.h"
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2002-06-25 00:57:28 +02:00
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#include "wine/debug.h"
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2001-12-04 20:54:44 +01:00
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2002-06-25 00:57:28 +02:00
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WINE_DEFAULT_DEBUG_CHANNEL(int);
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2001-12-04 20:54:44 +01:00
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2003-09-18 00:45:46 +02:00
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#if defined(linux) && defined(__i386__)
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# define DIRECT_IO_ACCESS
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#else
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# undef DIRECT_IO_ACCESS
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#endif /* linux && __i386__ */
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static struct {
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WORD countmax;
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BOOL16 byte_toggle; /* if TRUE, then hi byte has already been written */
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WORD latch;
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BOOL16 latched;
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BYTE ctrlbyte_ch;
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WORD oldval;
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} tmr_8253[3] = {
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{0xFFFF, FALSE, 0, FALSE, 0x36, 0},
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{0x0012, FALSE, 0, FALSE, 0x74, 0},
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{0x0001, FALSE, 0, FALSE, 0xB6, 0},
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};
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static int dummy_ctr = 0;
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static BYTE parport_8255[4] = {0x4f, 0x20, 0xff, 0xff};
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static BYTE cmosaddress;
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2008-12-30 12:19:52 +01:00
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static int cmos_image_initialized = 0;
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2003-09-18 00:45:46 +02:00
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static BYTE cmosimage[64] =
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{
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2008-12-30 12:19:14 +01:00
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0x27, /* 0x00: seconds */
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0x34, /* 0X01: seconds alarm */
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0x31, /* 0x02: minutes */
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0x47, /* 0x03: minutes alarm */
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0x16, /* 0x04: hour */
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0x15, /* 0x05: hour alarm */
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0x00, /* 0x06: week day */
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0x01, /* 0x07: month day */
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0x04, /* 0x08: month */
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0x94, /* 0x09: year */
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0x26, /* 0x0a: state A */
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0x02, /* 0x0b: state B */
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0x50, /* 0x0c: state C */
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0x80, /* 0x0d: state D */
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0x00, /* 0x0e: state diagnostic */
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0x00, /* 0x0f: state state shutdown */
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0x40, /* 0x10: floppy type */
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0xb1, /* 0x11: reserved */
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0x00, /* 0x12: HD type */
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0x9c, /* 0x13: reserved */
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0x01, /* 0x14: equipment */
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0x80, /* 0x15: low base memory */
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0x02, /* 0x16: high base memory (0x280 => 640KB) */
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0x00, /* 0x17: low extended memory */
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2008-12-30 12:20:29 +01:00
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0x3b, /* 0x18: high extended memory (0x3b00 => 15MB) */
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2008-12-30 12:19:14 +01:00
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0x00, /* 0x19: HD 1 extended type byte */
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0x00, /* 0x1a: HD 2 extended type byte */
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0xad, /* 0x1b: reserved */
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0x02, /* 0x1c: reserved */
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0x10, /* 0x1d: reserved */
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0x00, /* 0x1e: reserved */
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0x00, /* 0x1f: installed features */
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0x08, /* 0x20: HD 1 low cylinder number */
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0x00, /* 0x21: HD 1 high cylinder number */
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0x00, /* 0x22: HD 1 heads */
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0x26, /* 0x23: HD 1 low pre-compensation start */
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0x00, /* 0x24: HD 1 high pre-compensation start */
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0x00, /* 0x25: HD 1 low landing zone */
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0x00, /* 0x26: HD 1 high landing zone */
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0x00, /* 0x27: HD 1 sectors */
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0x00, /* 0x28: options 1 */
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0x00, /* 0x29: reserved */
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0x00, /* 0x2a: reserved */
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0x00, /* 0x2b: options 2 */
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0x00, /* 0x2c: options 3 */
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0x3f, /* 0x2d: reserved */
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2008-12-30 12:19:52 +01:00
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0xcc, /* 0x2e: low CMOS ram checksum (computed automatically) */
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0xcc, /* 0x2f: high CMOS ram checksum (computed automatically) */
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2008-12-30 12:19:14 +01:00
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0x00, /* 0x30: low extended memory byte */
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0x1c, /* 0x31: high extended memory byte */
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0x19, /* 0x32: century byte */
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0x81, /* 0x33: setup information */
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0x00, /* 0x34: CPU speed */
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0x0e, /* 0x35: HD 2 low cylinder number */
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0x00, /* 0x36: HD 2 high cylinder number */
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0x80, /* 0x37: HD 2 heads */
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0x1b, /* 0x38: HD 2 low pre-compensation start */
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0x7b, /* 0x39: HD 2 high pre-compensation start */
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0x21, /* 0x3a: HD 2 low landing zone */
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0x00, /* 0x3b: HD 2 high landing zone */
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0x00, /* 0x3c: HD 2 sectors */
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0x00, /* 0x3d: reserved */
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0x05, /* 0x3e: reserved */
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0x5f /* 0x3f: reserved */
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2003-09-18 00:45:46 +02:00
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};
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static void IO_FixCMOSCheckSum(void)
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{
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WORD sum = 0;
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int i;
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for (i=0x10; i < 0x2d; i++)
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sum += cmosimage[i];
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cmosimage[0x2e] = sum >> 8; /* yes, this IS hi byte !! */
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cmosimage[0x2f] = sum & 0xff;
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2008-12-30 12:19:52 +01:00
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TRACE("calculated hi %02x, lo %02x\n", cmosimage[0x2e], cmosimage[0x2f]);
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2003-09-18 00:45:46 +02:00
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}
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#ifdef DIRECT_IO_ACCESS
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extern int iopl(int level);
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static char do_direct_port_access = -1;
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static char port_permissions[0x10000];
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#define IO_READ 1
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#define IO_WRITE 2
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#endif /* DIRECT_IO_ACCESS */
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#ifdef HAVE_PPDEV
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static int do_pp_port_access = -1; /* -1: uninitialized, 1: not available
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0: available);*/
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#endif
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static void set_timer_maxval(unsigned timer, unsigned maxval)
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{
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switch (timer) {
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case 0: /* System timer counter divisor */
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DOSVM_SetTimer(maxval);
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break;
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case 1: /* RAM refresh */
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FIXME("RAM refresh counter handling not implemented !\n");
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break;
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case 2: /* cassette & speaker */
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/* speaker on ? */
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if ((parport_8255[1] & 3) == 3)
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{
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TRACE("Beep (freq: %d) !\n", 1193180 / maxval );
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Beep(1193180 / maxval, 20);
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}
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break;
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}
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}
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/**********************************************************************
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* IO_port_init
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*/
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/* set_IO_permissions(int val1, int val)
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* Helper function for IO_port_init
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*/
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#ifdef DIRECT_IO_ACCESS
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static void set_IO_permissions(int val1, int val, char rw)
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{
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int j;
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if (val1 != -1) {
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if (val == -1) val = 0x3ff;
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for (j = val1; j <= val; j++)
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port_permissions[j] |= rw;
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do_direct_port_access = 1;
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val1 = -1;
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} else if (val != -1) {
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do_direct_port_access = 1;
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port_permissions[val] |= rw;
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}
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}
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/* do_IO_port_init_read_or_write(char* temp, char rw)
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* Helper function for IO_port_init
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*/
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static void do_IO_port_init_read_or_write(const WCHAR *str, char rw)
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{
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2004-09-22 04:46:38 +02:00
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int val, val1;
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unsigned int i;
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2003-09-18 00:45:46 +02:00
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WCHAR *end;
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static const WCHAR allW[] = {'a','l','l',0};
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if (!strcmpiW(str, allW))
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{
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for (i=0; i < sizeof(port_permissions); i++)
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port_permissions[i] |= rw;
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}
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else
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{
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val = -1;
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val1 = -1;
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while (*str)
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{
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switch(*str)
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{
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case ',':
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case ' ':
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case '\t':
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set_IO_permissions(val1, val, rw);
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val1 = -1;
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val = -1;
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str++;
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break;
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case '-':
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val1 = val;
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if (val1 == -1) val1 = 0;
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str++;
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break;
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default:
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if (isdigitW(*str))
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{
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val = strtoulW( str, &end, 0 );
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if (end == str)
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{
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val = -1;
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str++;
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}
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else str = end;
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}
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break;
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}
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}
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set_IO_permissions(val1, val, rw);
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}
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}
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static inline BYTE inb( WORD port )
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{
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BYTE b;
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__asm__ __volatile__( "inb %w1,%0" : "=a" (b) : "d" (port) );
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return b;
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}
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static inline WORD inw( WORD port )
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{
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WORD w;
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__asm__ __volatile__( "inw %w1,%0" : "=a" (w) : "d" (port) );
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return w;
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}
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static inline DWORD inl( WORD port )
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{
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DWORD dw;
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__asm__ __volatile__( "inl %w1,%0" : "=a" (dw) : "d" (port) );
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return dw;
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}
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static inline void outb( BYTE value, WORD port )
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{
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__asm__ __volatile__( "outb %b0,%w1" : : "a" (value), "d" (port) );
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}
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static inline void outw( WORD value, WORD port )
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{
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__asm__ __volatile__( "outw %w0,%w1" : : "a" (value), "d" (port) );
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}
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static inline void outl( DWORD value, WORD port )
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{
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__asm__ __volatile__( "outl %0,%w1" : : "a" (value), "d" (port) );
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}
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static void IO_port_init(void)
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{
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char tmp[1024];
|
2005-06-27 20:47:53 +02:00
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HANDLE root, hkey;
|
2003-09-18 00:45:46 +02:00
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DWORD dummy;
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OBJECT_ATTRIBUTES attr;
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UNICODE_STRING nameW;
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|
2005-06-27 20:47:53 +02:00
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static const WCHAR portsW[] = {'S','o','f','t','w','a','r','e','\\',
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'W','i','n','e','\\','V','D','M','\\','P','o','r','t','s',0};
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2003-09-18 00:45:46 +02:00
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static const WCHAR readW[] = {'r','e','a','d',0};
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static const WCHAR writeW[] = {'w','r','i','t','e',0};
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do_direct_port_access = 0;
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/* Can we do that? */
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if (!iopl(3))
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{
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iopl(0);
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|
2005-06-27 20:47:53 +02:00
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|
RtlOpenCurrentUser( KEY_ALL_ACCESS, &root );
|
2003-09-18 00:45:46 +02:00
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attr.Length = sizeof(attr);
|
2005-06-27 20:47:53 +02:00
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attr.RootDirectory = root;
|
2003-09-18 00:45:46 +02:00
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|
|
attr.ObjectName = &nameW;
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|
attr.Attributes = 0;
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|
attr.SecurityDescriptor = NULL;
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|
attr.SecurityQualityOfService = NULL;
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|
|
RtlInitUnicodeString( &nameW, portsW );
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|
2005-06-27 20:47:53 +02:00
|
|
|
/* @@ Wine registry key: HKCU\Software\Wine\VDM\Ports */
|
2003-09-18 00:45:46 +02:00
|
|
|
if (!NtOpenKey( &hkey, KEY_ALL_ACCESS, &attr ))
|
|
|
|
{
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|
|
RtlInitUnicodeString( &nameW, readW );
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|
|
if (!NtQueryValueKey( hkey, &nameW, KeyValuePartialInformation, tmp, sizeof(tmp), &dummy ))
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|
|
|
{
|
|
|
|
WCHAR *str = (WCHAR *)((KEY_VALUE_PARTIAL_INFORMATION *)tmp)->Data;
|
|
|
|
do_IO_port_init_read_or_write(str, IO_READ);
|
|
|
|
}
|
|
|
|
RtlInitUnicodeString( &nameW, writeW );
|
|
|
|
if (!NtQueryValueKey( hkey, &nameW, KeyValuePartialInformation, tmp, sizeof(tmp), &dummy ))
|
|
|
|
{
|
|
|
|
WCHAR *str = (WCHAR *)((KEY_VALUE_PARTIAL_INFORMATION *)tmp)->Data;
|
|
|
|
do_IO_port_init_read_or_write(str, IO_WRITE);
|
|
|
|
}
|
|
|
|
NtClose( hkey );
|
|
|
|
}
|
2005-06-27 20:47:53 +02:00
|
|
|
NtClose( root );
|
2003-09-18 00:45:46 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* DIRECT_IO_ACCESS */
|
|
|
|
|
|
|
|
|
2001-12-04 20:54:44 +01:00
|
|
|
/**********************************************************************
|
2003-09-18 00:45:46 +02:00
|
|
|
* inport (WINEDOS.@)
|
|
|
|
*
|
|
|
|
* Note: The size argument has to be handled correctly _externally_
|
|
|
|
* (as we always return a DWORD)
|
2001-12-04 20:54:44 +01:00
|
|
|
*/
|
2003-09-18 00:45:46 +02:00
|
|
|
DWORD WINAPI DOSVM_inport( int port, int size )
|
2001-12-04 20:54:44 +01:00
|
|
|
{
|
2003-09-18 00:45:46 +02:00
|
|
|
DWORD res = ~0U;
|
|
|
|
|
|
|
|
TRACE("%d-byte value from port 0x%04x\n", size, port );
|
|
|
|
|
|
|
|
#ifdef HAVE_PPDEV
|
|
|
|
if (do_pp_port_access == -1) do_pp_port_access =IO_pp_init();
|
|
|
|
if ((do_pp_port_access == 0 ) && (size == 1))
|
|
|
|
{
|
|
|
|
if (!IO_pp_inp(port,&res)) return res;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef DIRECT_IO_ACCESS
|
|
|
|
if (do_direct_port_access == -1) IO_port_init();
|
|
|
|
if ((do_direct_port_access)
|
|
|
|
/* Make sure we have access to the port */
|
|
|
|
&& (port_permissions[port] & IO_READ))
|
|
|
|
{
|
|
|
|
iopl(3);
|
|
|
|
switch(size)
|
|
|
|
{
|
|
|
|
case 1: res = inb( port ); break;
|
|
|
|
case 2: res = inw( port ); break;
|
|
|
|
case 4: res = inl( port ); break;
|
|
|
|
}
|
|
|
|
iopl(0);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2001-12-04 20:54:44 +01:00
|
|
|
switch (port)
|
|
|
|
{
|
2003-09-18 00:45:46 +02:00
|
|
|
case 0x40:
|
|
|
|
case 0x41:
|
|
|
|
case 0x42:
|
|
|
|
{
|
|
|
|
BYTE chan = port & 3;
|
|
|
|
WORD tempval = 0;
|
|
|
|
if (tmr_8253[chan].latched)
|
|
|
|
tempval = tmr_8253[chan].latch;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
dummy_ctr -= 1 + (int)(10.0 * rand() / (RAND_MAX + 1.0));
|
|
|
|
if (chan == 0) /* System timer counter divisor */
|
|
|
|
{
|
|
|
|
/* FIXME: DOSVM_GetTimer() returns quite rigid values */
|
|
|
|
tempval = dummy_ctr + (WORD)DOSVM_GetTimer();
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* FIXME: intelligent hardware timer emulation needed */
|
|
|
|
tempval = dummy_ctr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
switch ((tmr_8253[chan].ctrlbyte_ch & 0x30) >> 4)
|
|
|
|
{
|
|
|
|
case 0:
|
|
|
|
res = 0; /* shouldn't happen? */
|
|
|
|
break;
|
|
|
|
case 1: /* read lo byte */
|
|
|
|
res = (BYTE)tempval;
|
|
|
|
tmr_8253[chan].latched = FALSE;
|
|
|
|
break;
|
|
|
|
case 3: /* read lo byte, then hi byte */
|
|
|
|
tmr_8253[chan].byte_toggle ^= 1; /* toggle */
|
|
|
|
if (tmr_8253[chan].byte_toggle)
|
|
|
|
{
|
|
|
|
res = (BYTE)tempval;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* else [fall through if read hi byte !] */
|
|
|
|
case 2: /* read hi byte */
|
|
|
|
res = (BYTE)(tempval >> 8);
|
|
|
|
tmr_8253[chan].latched = FALSE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2001-12-04 20:54:44 +01:00
|
|
|
case 0x60:
|
2003-09-18 00:45:46 +02:00
|
|
|
res = DOSVM_Int09ReadScan(NULL);
|
|
|
|
break;
|
|
|
|
case 0x61:
|
|
|
|
res = (DWORD)parport_8255[1];
|
|
|
|
break;
|
|
|
|
case 0x62:
|
|
|
|
res = (DWORD)parport_8255[2];
|
|
|
|
break;
|
|
|
|
case 0x70:
|
|
|
|
res = (DWORD)cmosaddress;
|
|
|
|
break;
|
|
|
|
case 0x71:
|
2008-12-30 12:19:52 +01:00
|
|
|
if (!cmos_image_initialized)
|
|
|
|
{
|
|
|
|
IO_FixCMOSCheckSum();
|
|
|
|
cmos_image_initialized = 1;
|
|
|
|
}
|
2003-09-18 00:45:46 +02:00
|
|
|
res = (DWORD)cmosimage[cmosaddress & 0x3f];
|
|
|
|
break;
|
|
|
|
case 0x200:
|
|
|
|
case 0x201:
|
|
|
|
res = ~0U; /* no joystick */
|
2001-12-04 20:54:44 +01:00
|
|
|
break;
|
2002-05-16 20:34:48 +02:00
|
|
|
case 0x22a:
|
|
|
|
case 0x22c:
|
|
|
|
case 0x22e:
|
2003-09-18 00:45:46 +02:00
|
|
|
res = (DWORD)SB_ioport_in( port );
|
2002-05-16 20:34:48 +02:00
|
|
|
break;
|
2008-10-17 23:28:30 +02:00
|
|
|
/* VGA read registers */
|
|
|
|
case 0x3b4: /* CRT Controller Register - Index (MDA) */
|
|
|
|
case 0x3b5: /* CRT Controller Register - Other (MDA) */
|
|
|
|
case 0x3ba: /* General Register - Input status 1 (MDA) */
|
|
|
|
case 0x3c0: /* Attribute Controller - Address */
|
|
|
|
case 0x3c1: /* Attribute Controller - Other */
|
|
|
|
case 0x3c2: /* General Register - Input status 0 */
|
|
|
|
case 0x3c3: /* General Register - Video subsystem enable */
|
|
|
|
case 0x3c4: /* Sequencer Register - Address */
|
|
|
|
case 0x3c5: /* Sequencer Register - Other */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3c6:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3c7: /* General Register - DAC State */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3c8:
|
|
|
|
case 0x3c9:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3ca: /* General Register - Feature control */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3cb:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3cc: /* General Register - Misc output */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3cd:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3ce: /* Graphics Controller Register - Address */
|
|
|
|
case 0x3cf: /* Graphics Controller Register - Other */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3d0:
|
|
|
|
case 0x3d1:
|
|
|
|
case 0x3d2:
|
|
|
|
case 0x3d3:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3d4: /* CRT Controller Register - Index (CGA) */
|
|
|
|
case 0x3d5: /* CRT Controller Register - Other (CGA) */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3d6:
|
|
|
|
case 0x3d7:
|
|
|
|
case 0x3d8:
|
|
|
|
case 0x3d9:
|
2001-12-04 20:54:44 +01:00
|
|
|
case 0x3da:
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3db:
|
|
|
|
case 0x3dc:
|
|
|
|
case 0x3dd:
|
|
|
|
case 0x3de:
|
|
|
|
case 0x3df:
|
2008-12-30 12:19:52 +01:00
|
|
|
if (size > 1)
|
|
|
|
FIXME("Trying to read more than one byte from VGA!\n");
|
2003-09-18 00:45:46 +02:00
|
|
|
res = (DWORD)VGA_ioport_in( port );
|
2001-12-04 20:54:44 +01:00
|
|
|
break;
|
2002-05-16 20:34:48 +02:00
|
|
|
case 0x00:
|
|
|
|
case 0x01:
|
|
|
|
case 0x02:
|
|
|
|
case 0x03:
|
|
|
|
case 0x04:
|
|
|
|
case 0x05:
|
|
|
|
case 0x06:
|
|
|
|
case 0x07:
|
|
|
|
case 0xC0:
|
|
|
|
case 0xC2:
|
|
|
|
case 0xC4:
|
|
|
|
case 0xC6:
|
|
|
|
case 0xC8:
|
|
|
|
case 0xCA:
|
2002-06-01 01:06:46 +02:00
|
|
|
case 0xCC:
|
2002-05-16 20:34:48 +02:00
|
|
|
case 0xCE:
|
|
|
|
case 0x87:
|
|
|
|
case 0x83:
|
|
|
|
case 0x81:
|
|
|
|
case 0x82:
|
|
|
|
case 0x8B:
|
|
|
|
case 0x89:
|
|
|
|
case 0x8A:
|
|
|
|
case 0x487:
|
|
|
|
case 0x483:
|
|
|
|
case 0x481:
|
|
|
|
case 0x482:
|
|
|
|
case 0x48B:
|
|
|
|
case 0x489:
|
|
|
|
case 0x48A:
|
|
|
|
case 0x08:
|
|
|
|
case 0xD0:
|
|
|
|
case 0x0D:
|
|
|
|
case 0xDA:
|
2003-09-18 00:45:46 +02:00
|
|
|
res = (DWORD)DMA_ioport_in( port );
|
2002-05-16 20:34:48 +02:00
|
|
|
break;
|
2001-12-04 20:54:44 +01:00
|
|
|
default:
|
2003-09-18 00:45:46 +02:00
|
|
|
WARN("Direct I/O read attempted from port %x\n", port);
|
|
|
|
break;
|
2001-12-04 20:54:44 +01:00
|
|
|
}
|
2003-09-18 00:45:46 +02:00
|
|
|
return res;
|
2001-12-04 20:54:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**********************************************************************
|
2003-09-18 00:45:46 +02:00
|
|
|
* outport (WINEDOS.@)
|
2001-12-04 20:54:44 +01:00
|
|
|
*/
|
2003-09-18 00:45:46 +02:00
|
|
|
void WINAPI DOSVM_outport( int port, int size, DWORD value )
|
2001-12-04 20:54:44 +01:00
|
|
|
{
|
2006-10-03 14:04:49 +02:00
|
|
|
TRACE("IO: 0x%x (%d-byte value) to port 0x%04x\n", value, size, port );
|
2003-09-18 00:45:46 +02:00
|
|
|
|
|
|
|
#ifdef HAVE_PPDEV
|
|
|
|
if (do_pp_port_access == -1) do_pp_port_access = IO_pp_init();
|
|
|
|
if ((do_pp_port_access == 0) && (size == 1))
|
|
|
|
{
|
|
|
|
if (!IO_pp_outp(port,&value)) return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef DIRECT_IO_ACCESS
|
|
|
|
|
|
|
|
if (do_direct_port_access == -1) IO_port_init();
|
|
|
|
if ((do_direct_port_access)
|
|
|
|
/* Make sure we have access to the port */
|
|
|
|
&& (port_permissions[port] & IO_WRITE))
|
|
|
|
{
|
|
|
|
iopl(3);
|
|
|
|
switch(size)
|
|
|
|
{
|
|
|
|
case 1: outb( LOBYTE(value), port ); break;
|
|
|
|
case 2: outw( LOWORD(value), port ); break;
|
|
|
|
case 4: outl( value, port ); break;
|
|
|
|
}
|
|
|
|
iopl(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2001-12-04 20:54:44 +01:00
|
|
|
switch (port)
|
|
|
|
{
|
|
|
|
case 0x20:
|
|
|
|
DOSVM_PIC_ioport_out( port, (BYTE)value );
|
|
|
|
break;
|
2003-09-18 00:45:46 +02:00
|
|
|
case 0x40:
|
|
|
|
case 0x41:
|
|
|
|
case 0x42:
|
|
|
|
{
|
|
|
|
BYTE chan = port & 3;
|
|
|
|
|
|
|
|
/* we need to get the oldval before any lo/hi byte change has been made */
|
|
|
|
if (((tmr_8253[chan].ctrlbyte_ch & 0x30) != 0x30) ||
|
|
|
|
!tmr_8253[chan].byte_toggle)
|
|
|
|
tmr_8253[chan].oldval = tmr_8253[chan].countmax;
|
|
|
|
switch ((tmr_8253[chan].ctrlbyte_ch & 0x30) >> 4)
|
|
|
|
{
|
|
|
|
case 0:
|
|
|
|
break; /* shouldn't happen? */
|
|
|
|
case 1: /* write lo byte */
|
|
|
|
tmr_8253[chan].countmax =
|
|
|
|
(tmr_8253[chan].countmax & 0xff00) | (BYTE)value;
|
|
|
|
break;
|
|
|
|
case 3: /* write lo byte, then hi byte */
|
|
|
|
tmr_8253[chan].byte_toggle ^= TRUE; /* toggle */
|
|
|
|
if (tmr_8253[chan].byte_toggle)
|
|
|
|
{
|
|
|
|
tmr_8253[chan].countmax =
|
|
|
|
(tmr_8253[chan].countmax & 0xff00) | (BYTE)value;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* else [fall through if write hi byte !] */
|
|
|
|
case 2: /* write hi byte */
|
|
|
|
tmr_8253[chan].countmax =
|
|
|
|
(tmr_8253[chan].countmax & 0x00ff) | ((BYTE)value << 8);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* if programming is finished and value has changed
|
|
|
|
then update to new value */
|
|
|
|
if ((((tmr_8253[chan].ctrlbyte_ch & 0x30) != 0x30) ||
|
|
|
|
!tmr_8253[chan].byte_toggle) &&
|
|
|
|
(tmr_8253[chan].countmax != tmr_8253[chan].oldval))
|
|
|
|
set_timer_maxval(chan, tmr_8253[chan].countmax);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x43:
|
|
|
|
{
|
|
|
|
BYTE chan = ((BYTE)value & 0xc0) >> 6;
|
|
|
|
/* ctrl byte for specific timer channel */
|
|
|
|
if (chan == 3)
|
|
|
|
{
|
|
|
|
FIXME("8254 timer readback not implemented yet\n");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
switch (((BYTE)value & 0x30) >> 4)
|
|
|
|
{
|
|
|
|
case 0: /* latch timer */
|
|
|
|
tmr_8253[chan].latched = TRUE;
|
|
|
|
dummy_ctr -= 1 + (int)(10.0 * rand() / (RAND_MAX + 1.0));
|
|
|
|
if (chan == 0) /* System timer divisor */
|
|
|
|
tmr_8253[chan].latch = dummy_ctr + (WORD)DOSVM_GetTimer();
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* FIXME: intelligent hardware timer emulation needed */
|
|
|
|
tmr_8253[chan].latch = dummy_ctr;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3: /* write lo byte, then hi byte */
|
|
|
|
tmr_8253[chan].byte_toggle = FALSE; /* init */
|
|
|
|
/* fall through */
|
|
|
|
case 1: /* write lo byte only */
|
|
|
|
case 2: /* write hi byte only */
|
|
|
|
tmr_8253[chan].ctrlbyte_ch = (BYTE)value;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x61:
|
|
|
|
parport_8255[1] = (BYTE)value;
|
2008-01-24 22:41:43 +01:00
|
|
|
if (((parport_8255[1] & 3) == 3) && (tmr_8253[2].countmax != 1))
|
2003-09-18 00:45:46 +02:00
|
|
|
{
|
|
|
|
TRACE("Beep (freq: %d) !\n", 1193180 / tmr_8253[2].countmax);
|
|
|
|
Beep(1193180 / tmr_8253[2].countmax, 20);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x70:
|
|
|
|
cmosaddress = (BYTE)value & 0x7f;
|
|
|
|
break;
|
|
|
|
case 0x71:
|
2008-12-30 12:19:52 +01:00
|
|
|
if (!cmos_image_initialized)
|
|
|
|
{
|
|
|
|
IO_FixCMOSCheckSum();
|
|
|
|
cmos_image_initialized = 1;
|
|
|
|
}
|
2003-09-18 00:45:46 +02:00
|
|
|
cmosimage[cmosaddress & 0x3f] = (BYTE)value;
|
|
|
|
break;
|
2002-06-01 01:06:46 +02:00
|
|
|
case 0x226:
|
2002-05-16 20:34:48 +02:00
|
|
|
case 0x22c:
|
|
|
|
SB_ioport_out( port, (BYTE)value );
|
|
|
|
break;
|
2008-10-17 23:28:30 +02:00
|
|
|
/* VGA Write registers */
|
|
|
|
case 0x3b4: /* CRT Controller Register - Index (MDA) */
|
|
|
|
case 0x3b5: /* CRT Controller Register - Other (MDA) */
|
|
|
|
case 0x3ba: /* General Register - Feature Control */
|
|
|
|
case 0x3c0: /* Attribute Controller - Address/Other */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3c1:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3c2: /* General Register - Misc output */
|
|
|
|
case 0x3c3: /* General Register - Video subsystem enable */
|
|
|
|
case 0x3c4: /* Sequencer Register - Address */
|
|
|
|
case 0x3c5: /* Sequencer Register - Other */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3c6:
|
|
|
|
case 0x3c7:
|
2001-12-04 20:54:44 +01:00
|
|
|
case 0x3c8:
|
|
|
|
case 0x3c9:
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3ca:
|
|
|
|
case 0x3cb:
|
|
|
|
case 0x3cc:
|
|
|
|
case 0x3cd:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3ce: /* Graphics Controller Register - Address */
|
|
|
|
case 0x3cf: /* Graphics Controller Register - Other */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3d0:
|
|
|
|
case 0x3d1:
|
|
|
|
case 0x3d2:
|
|
|
|
case 0x3d3:
|
2008-10-17 23:28:30 +02:00
|
|
|
case 0x3d4: /* CRT Controller Register - Index (CGA) */
|
|
|
|
case 0x3d5: /* CRT Controller Register - Other (CGA) */
|
2002-06-25 00:57:28 +02:00
|
|
|
case 0x3d6:
|
|
|
|
case 0x3d7:
|
|
|
|
case 0x3d8:
|
|
|
|
case 0x3d9:
|
|
|
|
case 0x3da:
|
|
|
|
case 0x3db:
|
|
|
|
case 0x3dc:
|
|
|
|
case 0x3dd:
|
|
|
|
case 0x3de:
|
|
|
|
case 0x3df:
|
2002-07-30 01:29:03 +02:00
|
|
|
VGA_ioport_out( port, LOBYTE(value) );
|
|
|
|
if(size > 1) {
|
|
|
|
VGA_ioport_out( port+1, HIBYTE(value) );
|
|
|
|
if(size > 2) {
|
|
|
|
VGA_ioport_out( port+2, LOBYTE(HIWORD(value)) );
|
|
|
|
VGA_ioport_out( port+3, HIBYTE(HIWORD(value)) );
|
|
|
|
}
|
|
|
|
}
|
2001-12-04 20:54:44 +01:00
|
|
|
break;
|
2002-05-16 20:34:48 +02:00
|
|
|
case 0x00:
|
|
|
|
case 0x01:
|
|
|
|
case 0x02:
|
|
|
|
case 0x03:
|
|
|
|
case 0x04:
|
|
|
|
case 0x05:
|
|
|
|
case 0x06:
|
|
|
|
case 0x07:
|
|
|
|
case 0xC0:
|
|
|
|
case 0xC2:
|
|
|
|
case 0xC4:
|
|
|
|
case 0xC6:
|
|
|
|
case 0xC8:
|
|
|
|
case 0xCA:
|
2002-06-01 01:06:46 +02:00
|
|
|
case 0xCC:
|
2002-05-16 20:34:48 +02:00
|
|
|
case 0xCE:
|
|
|
|
case 0x87:
|
|
|
|
case 0x83:
|
|
|
|
case 0x81:
|
|
|
|
case 0x82:
|
|
|
|
case 0x8B:
|
|
|
|
case 0x89:
|
|
|
|
case 0x8A:
|
|
|
|
case 0x487:
|
|
|
|
case 0x483:
|
|
|
|
case 0x481:
|
|
|
|
case 0x482:
|
|
|
|
case 0x48B:
|
|
|
|
case 0x489:
|
|
|
|
case 0x48A:
|
|
|
|
case 0x08:
|
|
|
|
case 0xD0:
|
|
|
|
case 0x0B:
|
|
|
|
case 0xD6:
|
|
|
|
case 0x0A:
|
|
|
|
case 0xD4:
|
|
|
|
case 0x0F:
|
|
|
|
case 0xDE:
|
|
|
|
case 0x09:
|
|
|
|
case 0xD2:
|
|
|
|
case 0x0C:
|
|
|
|
case 0xD8:
|
|
|
|
case 0x0D:
|
|
|
|
case 0xDA:
|
|
|
|
case 0x0E:
|
|
|
|
case 0xDC:
|
|
|
|
DMA_ioport_out( port, (BYTE)value );
|
|
|
|
break;
|
2001-12-04 20:54:44 +01:00
|
|
|
default:
|
2003-09-18 00:45:46 +02:00
|
|
|
WARN("Direct I/O write attempted to port %x\n", port );
|
|
|
|
break;
|
2001-12-04 20:54:44 +01:00
|
|
|
}
|
|
|
|
}
|